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0.4-V logic library friendly SRAM array using rectangular-diffusion cell and delta-boosted-array-voltage scheme

Yamaoka, M. ; Osada, K. ; Ishibashi, K.

2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302), 2002, p.170-173

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Título:
0.4-V logic library friendly SRAM array using rectangular-diffusion cell and delta-boosted-array-voltage scheme
Autor: Yamaoka, M. ; Osada, K. ; Ishibashi, K.
Assuntos: Applied sciences ; Circuit noise ; Design. Technologies. Operation analysis. Testing ; Electronics ; Exact sciences and technology ; Integrated circuits ; Integrated circuits by function (including memories and processors) ; Laboratories ; Libraries ; Logic arrays ; Logic circuits ; Logic design ; Low voltage ; MOS devices ; Random access memory ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Shape
É parte de: 2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302), 2002, p.170-173
Descrição: We designed a logic library friendly SRAM array. The array uses rectangular-diffusion cell (RD-cell) and delta-boosted-array-voltage scheme (DBA-scheme). In the RD-cell, the cell ratio is 1.0, and it reduces the imbalance of the cell ratio. A low supply voltage deteriorates the static noise margin, however, the DBA-scheme compensates it. Using the combination of RD-cell and DBA-scheme, a 32-kB test chip achieves 0.4-V operation at 4.5-MHz frequency and 140-/spl mu/W power dissipation and 0.9-/spl mu/A standby current.
Editor: Piscataway NJ: IEEE
Idioma: Inglês

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