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A Script-Based Cycle-True Verification Framework to Speed-Up Hardware and Software Co-Design: Performance Evaluation on ECC Accelerator Use-Case

Zulberti, Luca ; Di Matteo, Stefano ; Nannipieri, Pietro ; Saponara, Sergio ; Fanucci, Luca

Electronics (Basel), 2022-11, Vol.11 (22), p.3704 [Periódico revisado por pares]

Basel: MDPI AG

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  • Título:
    A Script-Based Cycle-True Verification Framework to Speed-Up Hardware and Software Co-Design: Performance Evaluation on ECC Accelerator Use-Case
  • Autor: Zulberti, Luca ; Di Matteo, Stefano ; Nannipieri, Pietro ; Saponara, Sergio ; Fanucci, Luca
  • Assuntos: automating workflow ; Automation ; Co-design ; Cryptography ; cycle-true simulation ; Data security ; Design and construction ; design productivity ; Designers ; Electronic design automation ; Embedded systems ; Field programmable gate arrays ; Hardware ; Large scale integration ; Methods ; Modular structures ; Performance evaluation ; Recipes ; risc-v ; Simulation ; Software ; Software development ; Space exploration ; System on chip ; Teams ; Verification ; Very large scale integration ; Workflow
  • É parte de: Electronics (Basel), 2022-11, Vol.11 (22), p.3704
  • Descrição: Digital designs complexity has exponentially increased in the last decades. Heterogeneous Systems-on-Chip integrate many different hardware components which require a reliable and scalable verification environment. The effort to set up such environments has increased as well and plays a significant role in digital design projects, taking more than 50% of the total project time. Several solutions have been developed with the goal of automating this task, integrating various steps of the Very Large Scale Integration design flow, but without addressing the exploration of the design space on both the software and hardware sides. Early in the co-design phase, designers break down the system into hardware and software parts taking into account different choices to explore the design space. This work describes the use of a framework for automating the verification of such choices, considering both hardware and software development flows. The framework automates compilation of software, cycle-true simulations and analyses on synthesised netlists. It accelerates the design space exploration exploiting the GNU Make tool, and we focus on ensuring consistency of results and providing a mechanism to obtain reproducibility of the design flow. In design teams, the last feature increases cooperation and knowledge sharing from single expert to the whole team. Using flow recipes, designers can configure various third-party tools integrated into the modular structure of the framework, and make workflow execution customisable. We demonstrate how the developed framework can be used to speed up the setup of the evaluation flow of an Elliptic-Curve-Cryptography accelerator, performing post-synthesis analyses. The framework can be easily configured taking approximately 30 min, instead of few days, to build up an environment to assess the accelerator performance and its resistance to simple power analysis side-channel attacks.
  • Editor: Basel: MDPI AG
  • Idioma: Inglês
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  • Realização: ABCD-USP USP   Logos de Redes Sociais: Freepik

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