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0.25-μm technology arithmetic codec for mobile multimedia communicators
Alvarez, Alberto ; Lopez, Sebastian ; Lopez, Jose F ; Sarmiento, Roberto
SPIE proceedings series, 2003, Vol.5117, p.361-369
Bellingham WA: SPIE
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Título:
0.25-μm technology arithmetic codec for mobile multimedia communicators
Autor:
Alvarez, Alberto
;
Lopez, Sebastian
;
Lopez, Jose F
;
Sarmiento, Roberto
Assuntos:
Applied sciences
;
Coding, codes
;
Electronics
;
Exact sciences and technology
;
Image processing
;
Information, signal and communications theory
;
Integrated circuits
;
Integrated circuits by function (including memories and processors)
;
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
;
Signal and communications theory
;
Signal processing
;
Telecommunications and information theory
É parte de:
SPIE proceedings series, 2003, Vol.5117, p.361-369
Notas:
Conference Date: 2003-05-19|2003-05-21
Conference Location: Maspalomas, Gran Canaria, Canary Islands, Spain
Descrição:
Low power dissipation is a must when dealing with mobile devices due to the influence related to its weight and hence, its portability. In this paper, the implementation of a 0.25 mm technology arithmetic codec with a good power/area/performance trade-off is presented. One of the key aspects introduced in order to obtain good performance is the fact of using low precision arithmetic rather than full precision, allowing the elimination of multiplications and divisions needed in order to process symbols and coefficients. These operations are replaced by shift/add operations, minimizing the complexity of the algorithm and improving the encoding and decoding process. The chip has been described in a high level language, ensuring its portability to other technologies. The implementation gives as result a 25 mm2 chip, pads included, with a total power dissipation of 300 mW and a frequency of operation of 10 MHz.
Editor:
Bellingham WA: SPIE
Idioma:
Inglês
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