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Material Type: Artigo
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Energy-Efficient Exposed Datapath Architecture With a RISC-V Instruction Set ModeHepola, Kari ; Multanen, Joonas ; Jaaskelainen, PekkaIEEE transactions on computers, 2024-02, Vol.73 (2), p.1-13 [Periódico revisado por pares]IEEETexto completo disponível |
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Material Type: Artigo
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Implementing Over 100 Command Codes for a High-Speed Hybrid Brain-Computer Interface Using Concurrent P300 and SSVEP FeaturesXu, Minpeng ; Han, Jin ; Wang, Yijun ; Jung, Tzyy-Ping ; Ming, DongIEEE transactions on biomedical engineering, 2020-11, Vol.67 (11), p.3073-3082 [Periódico revisado por pares]United States: IEEETexto completo disponível |
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Material Type: Artigo
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Dedicated Instruction Set for Pattern-based Data Transfers: an Experimental Validation on Systems Containing In-Memory Computing UnitsMambu, Kevin ; Charles, Henri-Pierre ; Kooli, MahaIEEE transactions on computer-aided design of integrated circuits and systems, 2023-11, Vol.42 (11), p.1-1 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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Material Type: Artigo
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Compact Instruction Set Extensions for KyberLi, Lu ; Qin, Guofeng ; Yu, Yang ; Wang, WeijiaIEEE transactions on computer-aided design of integrated circuits and systems, 2024-03, Vol.43 (3), p.1-1 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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Material Type: Artigo
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A New ISA for High-Speed and Area-Efficient ALPGLee, Juyong ; Lee, Hayoung ; Lee, Sooryeong ; Kang, SunghoIEEE transactions on circuits and systems. II, Express briefs, 2024-02, p.1-1 [Periódico revisado por pares]IEEETexto completo disponível |
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Material Type: Artigo
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RISC-V-Based Evaluation and Strategy Exploration of MRAM Triple-Level Hybrid Cache SystemsHan, Shaopu ; Jiang, YanfengIEEE transactions on very large scale integration (VLSI) systems, 2023-07, Vol.31 (7), p.980-992 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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Material Type: Artigo
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Haswell: The Fourth-Generation Intel Core ProcessorHammarlund, Per ; Martinez, Alberto J. ; Bajwa, Atiq A. ; Hill, David L. ; Hallnor, Erik ; Jiang, Hong ; Dixon, Martin ; Derr, Michael ; Hunsaker, Mikal ; Kumar, Rajesh ; Osborne, Randy B. ; Rajwar, Ravi ; Singhal, Ronak ; D'Sa, Reynold ; Chappell, Robert ; Kaushik, Shiv ; Chennupaty, Srinivas ; Jourdan, Stephan ; Gunther, Steve ; Piazza, Tom ; Burton, TedIEEE MICRO, 2014-03, Vol.34 (2), p.6-20 [Periódico revisado por pares]Los Alamitos: IEEETexto completo disponível |
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Material Type: Artigo
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Back to Homogeneous Computing: A Tightly-Coupled Neuromorphic Processor With Neuromorphic ISAYang, Zhijie ; Wang, Lei ; Shi, Wei ; Wang, Yao ; Tie, Junbo ; Wang, Feng ; Yu, Xiang ; Peng, Linghui ; Xiao, Chao ; Xiao, Xun ; Yao, Yao ; Zhou, Gan ; Yu, Xuhu ; Gong, Rui ; Zhao, Xia ; Tang, Yuhua ; Xu, WeixiaIEEE transactions on parallel and distributed systems, 2023-11, Vol.34 (11), p.1-18 [Periódico revisado por pares]IEEETexto completo disponível |
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Material Type: Artigo
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Multi-Brain Coding Expands the Instruction Set in SSVEP-Based Brain-Computer InterfacesChu, Xingxing ; Yu, Yang ; Liu, Kaixuan ; Ye, Zeqi ; Hu, Dewen ; Zeng, Ling-LiIEEE transactions on human-machine systems, 2023-10, Vol.53 (5), p.1-9 [Periódico revisado por pares]IEEETexto completo disponível |
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Material Type: Artigo
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DSIP: A Scalable Inference Accelerator for Convolutional Neural NetworksJo, Jihyuck ; Cha, Soyoung ; Rho, Dayoung ; Park, In-CheolIEEE journal of solid-state circuits, 2018-02, Vol.53 (2), p.605-618 [Periódico revisado por pares]New York: IEEETexto completo disponível |