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Quaternary Debiasing for Physically Unclonable Functions
Quaternary Debiasing for Physically Unclonable Functions
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Quaternary Debiasing for Physically Unclonable Functions

Suzuki, Manami ; Ueno, Rei ; Homma, Naofumi ; Aoki, Takafumi

2018 IEEE 48th International Symposium on Multiple-Valued Logic (ISMVL), 2018, p.7-12

IEEE

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2
An Energy-Efficient Quaternary Serial Adder for Nanoelectronics
An Energy-Efficient Quaternary Serial Adder for Nanoelectronics
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An Energy-Efficient Quaternary Serial Adder for Nanoelectronics

Sedighiani, Shima ; Kazemi, Arman

2018 IEEE 48th International Symposium on Multiple-Valued Logic (ISMVL), 2018, p.44-49

IEEE

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3
Approximate quaternary addition with the fast carry chains of FPGAs
Approximate quaternary addition with the fast carry chains of FPGAs
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Approximate quaternary addition with the fast carry chains of FPGAs

Boroumand, Sina ; Afshar, Hadi P. ; Brisk, Philip

2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018, p.577-580

EDAA

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4
Characterization of Quaternary Threshold Functions in the Vilenkin-Chrestenson Basis
Characterization of Quaternary Threshold Functions in the Vilenkin-Chrestenson Basis
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Characterization of Quaternary Threshold Functions in the Vilenkin-Chrestenson Basis

Prokic, Ivan

2018 IEEE 48th International Symposium on Multiple-Valued Logic (ISMVL), 2018, p.13-18

IEEE

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5
Quaternary Generalized Boolean Bent Functions Obtained Through Permutation of Binary Boolean Bent Functions
Quaternary Generalized Boolean Bent Functions Obtained Through Permutation of Binary Boolean Bent Functions
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Quaternary Generalized Boolean Bent Functions Obtained Through Permutation of Binary Boolean Bent Functions

Stankovic, Radomir S. ; Stankovic, Milena ; Astola, Jaakko ; Moraga, Claudio

2018 IEEE 48th International Symposium on Multiple-Valued Logic (ISMVL), 2018, p.1-6

IEEE

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6
Beyond Bits: A Quaternary FPGA Architecture Using Multi-Vt Multi-Vdd FDSOI Devices
Beyond Bits: A Quaternary FPGA Architecture Using Multi-Vt Multi-Vdd FDSOI Devices
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Beyond Bits: A Quaternary FPGA Architecture Using Multi-Vt Multi-Vdd FDSOI Devices

Chaudhuri, Sumanta

2018 IEEE 48th International Symposium on Multiple-Valued Logic (ISMVL), 2018, p.38-43

IEEE

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7
Complex support vector machines for quaternary classification
Complex support vector machines for quaternary classification
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Complex support vector machines for quaternary classification

Bouboulis, P. ; Theodoridou, E. ; Theodoridis, S.

2013 IEEE International Workshop on Machine Learning for Signal Processing (MLSP), 2013, p.1-6

IEEE

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8
Minimization of Quaternary Galois Field Sum of Products Expression for Multi-Output Quaternary Logic Function Using Quaternary Galois Field Decision Diagram
Minimization of Quaternary Galois Field Sum of Products Expression for Multi-Output Quaternary Logic Function Using Quaternary Galois Field Decision Diagram
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Minimization of Quaternary Galois Field Sum of Products Expression for Multi-Output Quaternary Logic Function Using Quaternary Galois Field Decision Diagram

Khan, M.H.A. ; Siddika, N.K. ; Perkowski, M.A.

38th International Symposium on Multiple Valued Logic (ismvl 2008), 2008, p.125-130

IEEE

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9
Design of High Performance Quaternary Adders
Design of High Performance Quaternary Adders
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Design of High Performance Quaternary Adders

Patel K.S., Vasundara ; Gurumurthy, K.S.

2011 41st IEEE International Symposium on Multiple-Valued Logic, 2011, p.22-26

IEEE

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10
A feasibility study of quaternary FPGA designs by implementing Neuron-MOS mechanism
A feasibility study of quaternary FPGA designs by implementing Neuron-MOS mechanism
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A feasibility study of quaternary FPGA designs by implementing Neuron-MOS mechanism

Renyuan Zhang ; Kaneko, Mineo

2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015, p.942-945

IEEE

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