Result Number | Material Type | Add to My Shelf Action | Record Details and Options |
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Material Type: Artigo
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Inclusion of Chemical-Mechanical Polishing Variation in Statistical Static Timing AnalysisForeman, E. A. ; Habitz, P. A. ; Cheng, M-C ; Tamon, C.IEEE transactions on computer-aided design of integrated circuits and systems, 2011-11, Vol.30 (11), p.1758-1762 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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Material Type: Artigo
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Compact representation and efficient generation of s-expanded symbolic network functions for computer-aided analog circuit designShi, C.-J.R. ; Xiang-Dong TanIEEE transactions on computer-aided design of integrated circuits and systems, 2001-07, Vol.20 (7), p.813-827 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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Material Type: Artigo
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A multiparameter moment-matching model-reduction approach for generating geometrically parameterized interconnect performance modelsDaniel, L. ; Ong Chin Siong ; Chay, L.S. ; Kwok Hong Lee ; White, J.IEEE transactions on computer-aided design of integrated circuits and systems, 2004-05, Vol.23 (5), p.678-693 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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Material Type: Artigo
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Modeling and analysis of nonuniform substrate temperature effects on global ULSI interconnectsAjami, A.H. ; Banerjee, K. ; Pedram, M.IEEE transactions on computer-aided design of integrated circuits and systems, 2005-06, Vol.24 (6), p.849-861 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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Material Type: Artigo
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Verification of Analog/Mixed-Signal Circuits Using Symbolic MethodsWalter, D. ; Little, S. ; Myers, C. ; Seegmiller, N. ; Yoneda, T.IEEE transactions on computer-aided design of integrated circuits and systems, 2008-12, Vol.27 (12), p.2223-2235 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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Material Type: Artigo
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Min-cut floorplacementRoy, J.A. ; Adya, S.N. ; Papa, D.A. ; Markov, I.L.IEEE transactions on computer-aided design of integrated circuits and systems, 2006-07, Vol.25 (7), p.1313-1326 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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Material Type: Artigo
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Multiobjective hypergraph-partitioning algorithms for cut and maximum subdomain-degree minimizationSelvakkumaran, N. ; Karypis, G.IEEE transactions on computer-aided design of integrated circuits and systems, 2006-03, Vol.25 (3), p.504-517 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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Material Type: Artigo
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A Case of Lightweight PUF Constructions: Cryptanalysis and Machine Learning AttacksSahoo, Durga Prasad ; Phuong Ha Nguyen ; Mukhopadhyay, Debdeep ; Chakraborty, Rajat SubhraIEEE transactions on computer-aided design of integrated circuits and systems, 2015-08, Vol.34 (8), p.1334-1343 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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Material Type: Artigo
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Reversible cascades with minimal garbageMaslov, D. ; Dueck, G.W.IEEE transactions on computer-aided design of integrated circuits and systems, 2004-11, Vol.23 (11), p.1497-1509 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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Material Type: Artigo
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Characterization, test, and logic synthesis of and-or-inverter (AOI) gate design for QCA implementationMomenzadeh, M. ; Jing Huang ; Tahoori, M.B. ; Lombardi, F.IEEE transactions on computer-aided design of integrated circuits and systems, 2005-12, Vol.24 (12), p.1881-1893 [Periódico revisado por pares]New York: IEEETexto completo disponível |