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Automatic Identification of Parallelism in Handel-C
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Ata de Congresso
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Automatic Identification of Parallelism in Handel-C

Libby, J.C. ; Gharibian, F. ; Kent, K.B.

2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, 2008, p.660-664

IEEE

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2
Pearson-based Analysis of Positioning Error Distribution in Wireless Sensor Networks
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Ata de Congresso
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Pearson-based Analysis of Positioning Error Distribution in Wireless Sensor Networks

Tennina, S. ; Di Renzo, M. ; Graziosi, F. ; Santucci, F.

2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, 2008, p.685-692

IEEE

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3
Utilization of all Levels of Parallelism in a Processor Array with Subword Parallelism
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Ata de Congresso
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Utilization of all Levels of Parallelism in a Processor Array with Subword Parallelism

Schaffer, R. ; Merker, R. ; Hannig, F. ; Teich, J.

2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, 2008, p.391-398

IEEE

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4
IP reuse VLSI architecture for low complexity fast motion estimation in multimedia applications
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Ata de Congresso
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IP reuse VLSI architecture for low complexity fast motion estimation in multimedia applications

Fanucci, L. ; Saponara, S. ; Cenciotti, A.

Proceedings of the 26th Euromicro Conference. EUROMICRO 2000. Informatics: Inventing the Future, 2000, Vol.1, p.417-424 vol.1

IEEE

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5
A non-linearity self-calibration technique for delay-locked loop delay-lines
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Ata de Congresso
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A non-linearity self-calibration technique for delay-locked loop delay-lines

Baronti, F. ; Fanucci, L. ; Lunardini, D. ; Roncella, R. ; Saletti, R.

IMTC/2002. Proceedings of the 19th IEEE Instrumentation and Measurement Technology Conference (IEEE Cat. No.00CH37276), 2002, Vol.2, p.1007-1010 vol.2

IEEE

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