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Refinado por: assunto: Design Methodology remover
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1
A Novel Digital Ultrasound System for Experimental Research Activities
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A Novel Digital Ultrasound System for Experimental Research Activities

Bassi, L. ; Boni, E. ; Cellai, A. ; Dallai, A. ; Guidi, F. ; Ricci, S. ; Tortoli, P.

2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, 2008, p.413-417

IEEE

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2
LIME: A Low-latency and Low-complexity On-chip Mesochronous Link with Integrated Flow Control
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Ata de Congresso
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LIME: A Low-latency and Low-complexity On-chip Mesochronous Link with Integrated Flow Control

Saponara, S. ; Vitullo, F. ; Locatelli, R. ; Teninge, P. ; Coppola, M. ; Fanucci, L.

2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, 2008, p.32-35

IEEE

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3
Design of a High Performance Traffic Generator on Network Processor
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Ata de Congresso
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Design of a High Performance Traffic Generator on Network Processor

Antichi, G. ; Di Pietro, A. ; Ficara, D. ; Giordano, S. ; Procissi, G. ; Vitucci, F.

2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, 2008, p.438-441

IEEE

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4
Automatic Identification of Parallelism in Handel-C
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Automatic Identification of Parallelism in Handel-C

Libby, J.C. ; Gharibian, F. ; Kent, K.B.

2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, 2008, p.660-664

IEEE

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5
An Embedded Acquisition System for Remote Monitoring of Tire Status in F1 Race Cars through Thermal Images
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An Embedded Acquisition System for Remote Monitoring of Tire Status in F1 Race Cars through Thermal Images

Danese, G. ; Giachero, M. ; Leporati, F. ; Nazzicari, N. ; Nobis, M.

2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, 2008, p.432-437

IEEE

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6
Utilization of all Levels of Parallelism in a Processor Array with Subword Parallelism
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Utilization of all Levels of Parallelism in a Processor Array with Subword Parallelism

Schaffer, R. ; Merker, R. ; Hannig, F. ; Teich, J.

2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, 2008, p.391-398

IEEE

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7
IP reuse VLSI architecture for low complexity fast motion estimation in multimedia applications
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IP reuse VLSI architecture for low complexity fast motion estimation in multimedia applications

Fanucci, L. ; Saponara, S. ; Cenciotti, A.

Proceedings of the 26th Euromicro Conference. EUROMICRO 2000. Informatics: Inventing the Future, 2000, Vol.1, p.417-424 vol.1

IEEE

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