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Refinado por: Nome da Publicação: Ieee Transactions On Computer-Aided Design Of Integrated Circuits And Systems remover nível superior: Revistas revisadas por pares remover
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PUF-Kyber: Design of a PUF-Based Kyber Architecture Benchmarked on Diverse ARM Processors
PUF-Kyber: Design of a PUF-Based Kyber Architecture Benchmarked on Diverse ARM Processors
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PUF-Kyber: Design of a PUF-Based Kyber Architecture Benchmarked on Diverse ARM Processors

Aghapour, Saeed ; Ahmadi, Kasra ; Anastasova, Mila ; Kermani, Mehran Mozaffari ; Azarderakhsh, Reza

IEEE transactions on computer-aided design of integrated circuits and systems, 2024-05, p.1-1 [Periódico revisado por pares]

IEEE

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2
A Distributed and Parallel Accelerator Design for 3-D Acoustic Imaging on FPGA-Based Systems
A Distributed and Parallel Accelerator Design for 3-D Acoustic Imaging on FPGA-Based Systems
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A Distributed and Parallel Accelerator Design for 3-D Acoustic Imaging on FPGA-Based Systems

Zhao, Dongdong ; Mao, Weibo ; Chen, Peng ; Hu, Yingtian ; Liang, Haoran ; Dang, Yuanjie ; Liang, Ronghua ; Guo, Xinxin

IEEE transactions on computer-aided design of integrated circuits and systems, 2024-05, Vol.43 (5), p.1401-1414 [Periódico revisado por pares]

New York: IEEE

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3
Quantum KNN Classification With K Value Selection and Neighbor Selection
Quantum KNN Classification With K Value Selection and Neighbor Selection
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Quantum KNN Classification With K Value Selection and Neighbor Selection

Li, Jiaye ; Zhang, Jian ; Zhang, Jilian ; Zhang, Shichao

IEEE transactions on computer-aided design of integrated circuits and systems, 2024-05, Vol.43 (5), p.1332-1345 [Periódico revisado por pares]

New York: IEEE

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4
ATA-Cache: Contention Mitigation for GPU Shared L1 Cache With Aggregated Tag Array
ATA-Cache: Contention Mitigation for GPU Shared L1 Cache With Aggregated Tag Array
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ATA-Cache: Contention Mitigation for GPU Shared L1 Cache With Aggregated Tag Array

Xu, Xiangrong ; Wang, Liang ; Xiao, Limin ; Liu, Lei ; Lv, Yuanqiu ; Xie, Xilong ; Han, Meng ; Liu, Hao

IEEE transactions on computer-aided design of integrated circuits and systems, 2024-05, Vol.43 (5), p.1429-1441 [Periódico revisado por pares]

New York: IEEE

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5
Hierarchical Mapping of Large-Scale Spiking Convolutional Neural Networks Onto Resource-Constrained Neuromorphic Processor
Hierarchical Mapping of Large-Scale Spiking Convolutional Neural Networks Onto Resource-Constrained Neuromorphic Processor
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Hierarchical Mapping of Large-Scale Spiking Convolutional Neural Networks Onto Resource-Constrained Neuromorphic Processor

Xiao, Chao ; He, Xu ; Yang, Zhijie ; Xiao, Xun ; Wang, Yao ; Gong, Rui ; Tie, Junbo ; Wang, Lei ; Xu, Weixia

IEEE transactions on computer-aided design of integrated circuits and systems, 2024-05, Vol.43 (5), p.1442-1455 [Periódico revisado por pares]

New York: IEEE

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6
An Automatic Neural Network Architecture-and-Quantization Joint Optimization Framework for Efficient Model Inference
An Automatic Neural Network Architecture-and-Quantization Joint Optimization Framework for Efficient Model Inference
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An Automatic Neural Network Architecture-and-Quantization Joint Optimization Framework for Efficient Model Inference

Liu, Lian ; Wang, Ying ; Zhao, Xiandong ; Chen, Weiwei ; Li, Huawei ; Li, Xiaowei ; Han, Yinhe

IEEE transactions on computer-aided design of integrated circuits and systems, 2024-05, Vol.43 (5), p.1497-1510 [Periódico revisado por pares]

New York: IEEE

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7
Dynamic Supply Noise Aware Timing Analysis With JIT Machine Learning Integration
Dynamic Supply Noise Aware Timing Analysis With JIT Machine Learning Integration
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Dynamic Supply Noise Aware Timing Analysis With JIT Machine Learning Integration

Chen, Yufei ; Guo, Zizheng ; Wang, Runsheng ; Huang, Ru ; Lin, Yibo ; Zhuo, Cheng

IEEE transactions on computer-aided design of integrated circuits and systems, 2024-05, Vol.43 (5), p.1511-1524 [Periódico revisado por pares]

New York: IEEE

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8
Revisiting TRIM on High-Density Flash-Based Hybrid Storage Systems
Revisiting TRIM on High-Density Flash-Based Hybrid Storage Systems
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Revisiting TRIM on High-Density Flash-Based Hybrid Storage Systems

Luo, Longfei ; Yu, Dingcui ; Li, Hang ; Song, Yunpeng ; Lv, Yina ; Sha, Edwin H.-M. ; Shi, Liang

IEEE transactions on computer-aided design of integrated circuits and systems, 2024-05, Vol.43 (5), p.1618-1622 [Periódico revisado por pares]

New York: IEEE

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9
DyBit: Dynamic Bit-Precision Numbers for Efficient Quantized Neural Network Inference
DyBit: Dynamic Bit-Precision Numbers for Efficient Quantized Neural Network Inference
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DyBit: Dynamic Bit-Precision Numbers for Efficient Quantized Neural Network Inference

Zhou, Jiajun ; Wu, Jiajun ; Gao, Yizhao ; Ding, Yuhao ; Tao, Chaofan ; Li, Boyu ; Tu, Fengbin ; Cheng, Kwang-Ting ; So, Hayden Kwok-Hay ; Wong, Ngai

IEEE transactions on computer-aided design of integrated circuits and systems, 2024-05, Vol.43 (5), p.1613-1617 [Periódico revisado por pares]

New York: IEEE

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10
Strider: Signal Value Transition-Guided Defect Repair for HDL Programming Assignments
Strider: Signal Value Transition-Guided Defect Repair for HDL Programming Assignments
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Strider: Signal Value Transition-Guided Defect Repair for HDL Programming Assignments

Yang, Deheng ; He, Jiayu ; Mao, Xiaoguang ; Li, Tun ; Lei, Yan ; Yi, Xin ; Wu, Jiang

IEEE transactions on computer-aided design of integrated circuits and systems, 2024-05, Vol.43 (5), p.1594-1607 [Periódico revisado por pares]

New York: IEEE

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