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1
Software-Defined Fog Network Architecture for IoT
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Software-Defined Fog Network Architecture for IoT

Tomovic, Slavica ; Yoshigoe, Kenji ; Maljevic, Ivo ; Radusinovic, Igor

Wireless personal communications, 2017, Vol.92 (1), p.181-196 [Periódico revisado por pares]

New York: Springer US

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2
Hardware Implementation of Architecture Techniques for Fast Efficient Lossless Image Compression System
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Hardware Implementation of Architecture Techniques for Fast Efficient Lossless Image Compression System

Muthukumaran, N. ; Ravi, R.

Wireless personal communications, 2016-10, Vol.90 (3), p.1291-1315 [Periódico revisado por pares]

New York: Springer US

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3
R-inmac: 10T SRAM based reconfigurable and efficient in-memory advance computation for edge devices
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R-inmac: 10T SRAM based reconfigurable and efficient in-memory advance computation for edge devices

Dhakad, Narendra Singh ; Chittora, Eshika ; Sharma, Vishal ; Vishvakarma, Santosh Kumar

Analog integrated circuits and signal processing, 2023-09, Vol.116 (3), p.161-184 [Periódico revisado por pares]

New York: Springer US

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4
VLSI implementation of high speed multiplier architecture using VHBCSE algorithm for DSP applications
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VLSI implementation of high speed multiplier architecture using VHBCSE algorithm for DSP applications

Perumal, Vivek Karthick ; Jayabalan, Ramesh ; Krishnan, Thiruvenkadam

Analog integrated circuits and signal processing, 2022-12, Vol.113 (3), p.307-313 [Periódico revisado por pares]

New York: Springer US

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5
Utilizing manufacturing variations to design a tri-state flip-flop PUF for IoT security applications
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Utilizing manufacturing variations to design a tri-state flip-flop PUF for IoT security applications

Khan, Sajid ; Shah, Ambika Prasad ; Chouhan, Shailesh Singh ; Rani, Sudha ; Gupta, Neha ; Pandey, Jai Gopal ; Vishvakarma, Santosh Kumar

Analog integrated circuits and signal processing, 2020-06, Vol.103 (3), p.477-492 [Periódico revisado por pares]

New York: Springer US

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6
Deep and shallow fast embedded capsule networks: going faster with capsules
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Deep and shallow fast embedded capsule networks: going faster with capsules

Abo-Zahhad, Mohammed ; Eldifrawi, Islam ; Abdelwahab, Moataz ; El-Malek, Ahmed H. Abd

Analog integrated circuits and signal processing, 2023-03, Vol.114 (3), p.315-324 [Periódico revisado por pares]

New York: Springer US

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7
A Survey on Architecture, Protocols and Challenges in IoT
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A Survey on Architecture, Protocols and Challenges in IoT

Sobin, C. C.

Wireless personal communications, 2020-06, Vol.112 (3), p.1383-1429 [Periódico revisado por pares]

New York: Springer US

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8
Sharing SIMD execution units with decoupled offloader in asymmetric multicores
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Sharing SIMD execution units with decoupled offloader in asymmetric multicores

Vieira, Caio ; Beck, Antonio Carlos Schneider

Analog integrated circuits and signal processing, 2022-08, Vol.112 (2), p.263-275 [Periódico revisado por pares]

New York: Springer US

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9
An efficient and unified 2D-inverse integer cosine transform (IICT) FPGA-hardware implementation for HEVC standard
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An efficient and unified 2D-inverse integer cosine transform (IICT) FPGA-hardware implementation for HEVC standard

Kammoun, Ahmed ; Belghith, Fatma ; Loukil, Hassen ; Masmoudi, Nouri

Analog integrated circuits and signal processing, 2019-12, Vol.101 (3), p.431-440 [Periódico revisado por pares]

New York: Springer US

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10
A novel 9T SRAM architecture for low leakage and high performance
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A novel 9T SRAM architecture for low leakage and high performance

Lorenzo, Rohit ; Chaudhury, Saurabh

Analog integrated circuits and signal processing, 2017-08, Vol.92 (2), p.315-325 [Periódico revisado por pares]

New York: Springer US

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