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VLSI Architecture of Arithmetic Coder Used in SPIHT
VLSI Architecture of Arithmetic Coder Used in SPIHT
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VLSI Architecture of Arithmetic Coder Used in SPIHT

KAI LIU ; BELYAEV, Evgeniy ; JIE GUO

IEEE transactions on very large scale integration (VLSI) systems, 2012, Vol.20 (4), p.697-710 [Periódico revisado por pares]

New York, NY: Institute of Electrical and Electronics Engineers

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Information processing using dynamical chaos: neural networks implementation
Information processing using dynamical chaos: neural networks implementation
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Information processing using dynamical chaos: neural networks implementation

Andreyev, Y.V. ; Belsky, Y.L. ; Dmitriev, A.S. ; Kuminov, D.A.

IEEE transactions on neural networks, 1996-03, Vol.7 (2), p.290-299

New York, NY: IEEE

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3
Low-Complexity Iterative Equalization for Symbol-Reconstruction-Based OFDM Receivers Over Doubly Selective Channels
Low-Complexity Iterative Equalization for Symbol-Reconstruction-Based OFDM Receivers Over Doubly Selective Channels
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Low-Complexity Iterative Equalization for Symbol-Reconstruction-Based OFDM Receivers Over Doubly Selective Channels

Liu, Guanghui ; Zhidkov, Sergey V. ; Li, Hongliang ; Zeng, Liaoyuan ; Wang, Zhengning

IEEE transactions on broadcasting, 2012-09, Vol.58 (3), p.390-400 [Periódico revisado por pares]

New York, NY: IEEE

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