skip to main content
Idioma:
Resultados 1 2 3 4 5 next page
Refinado por: Nome da Publicação: Ieee Transactions On Computer-Aided Design Of Integrated Circuits And Systems remover nível superior: Revistas revisadas por pares remover
Result Number Material Type Add to My Shelf Action Record Details and Options
1
Flexible and Efficient QoS Provisioning in AXI4-Based Network-on-Chip Architecture
Flexible and Efficient QoS Provisioning in AXI4-Based Network-on-Chip Architecture
Material Type:
Artigo 		Adicionar ao Meu Espaço

Flexible and Efficient QoS Provisioning in AXI4-Based Network-on-Chip Architecture

Wang, Boqian ; Lu, Zhonghai

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-05, Vol.41 (5), p.1523-1536 [Periódico revisado por pares]

New York: IEEE

Texto completo disponível

Citações Citado por
2
TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip
TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip
Material Type:
Artigo 		Adicionar ao Meu Espaço

TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip

Akopyan, Filipp ; Sawada, Jun ; Cassidy, Andrew ; Alvarez-Icaza, Rodrigo ; Arthur, John ; Merolla, Paul ; Imam, Nabil ; Nakamura, Yutaka ; Datta, Pallab ; Gi-Joon Nam ; Taba, Brian ; Beakes, Michael ; Brezzo, Bernard ; Kuang, Jente B. ; Manohar, Rajit ; Risk, William P. ; Jackson, Bryan ; Modha, Dharmendra S.

IEEE transactions on computer-aided design of integrated circuits and systems, 2015-10, Vol.34 (10), p.1537-1557 [Periódico revisado por pares]

New York: IEEE

Texto completo disponível

Citações Citado por
3
Gibbon: An Efficient Co-Exploration Framework of NN model and Processing-In-Memory Architecture
Gibbon: An Efficient Co-Exploration Framework of NN model and Processing-In-Memory Architecture
Material Type:
Artigo 		Adicionar ao Meu Espaço

Gibbon: An Efficient Co-Exploration Framework of NN model and Processing-In-Memory Architecture

Sun, Hanbo ; Zhu, Zhenhua ; Wang, Chenyu ; Ning, Xuefei ; Dai, Guohao ; Yang, Huazhong ; Wang, Yu

IEEE transactions on computer-aided design of integrated circuits and systems, 2023-11, Vol.42 (11), p.1-1 [Periódico revisado por pares]

New York: IEEE

Texto completo disponível

Citações Citado por
4
LCHR-TSV: Novel Low Cost and Highly Repairable Honeycomb-Based TSV Redundancy Architecture for Clustered Faults
LCHR-TSV: Novel Low Cost and Highly Repairable Honeycomb-Based TSV Redundancy Architecture for Clustered Faults
Material Type:
Artigo 		Adicionar ao Meu Espaço

LCHR-TSV: Novel Low Cost and Highly Repairable Honeycomb-Based TSV Redundancy Architecture for Clustered Faults

Ni, Tianming ; Yao, Yao ; Chang, Hao ; Lu, Lin ; Liang, Huaguo ; Yan, Aibin ; Huang, Zhengfeng ; Wen, Xiaoqing

IEEE transactions on computer-aided design of integrated circuits and systems, 2020-10, Vol.39 (10), p.2938-2951 [Periódico revisado por pares]

New York: IEEE

Texto completo disponível

Citações Citado por
5
An Efficient Methodology for Mapping Quantum Circuits to the IBM QX Architectures
An Efficient Methodology for Mapping Quantum Circuits to the IBM QX Architectures
Material Type:
Artigo 		Adicionar ao Meu Espaço

An Efficient Methodology for Mapping Quantum Circuits to the IBM QX Architectures

Zulehner, Alwin ; Paler, Alexandru ; Wille, Robert

IEEE transactions on computer-aided design of integrated circuits and systems, 2019-07, Vol.38 (7), p.1226-1236 [Periódico revisado por pares]

New York: IEEE

Texto completo disponível

Citações Citado por
6
Hardware/Software Co-Exploration of Neural Architectures
Hardware/Software Co-Exploration of Neural Architectures
Material Type:
Artigo 		Adicionar ao Meu Espaço

Hardware/Software Co-Exploration of Neural Architectures

Jiang, Weiwen ; Yang, Lei ; Sha, Edwin Hsing-Mean ; Zhuge, Qingfeng ; Gu, Shouzhen ; Dasgupta, Sakyasingha ; Shi, Yiyu ; Hu, Jingtong

IEEE transactions on computer-aided design of integrated circuits and systems, 2020-12, Vol.39 (12), p.4805-4815 [Periódico revisado por pares]

IEEE

Texto completo disponível

Citações Citado por
7
Specializing CGRAs for Light-Weight Convolutional Neural Networks
Specializing CGRAs for Light-Weight Convolutional Neural Networks
Material Type:
Artigo 		Adicionar ao Meu Espaço

Specializing CGRAs for Light-Weight Convolutional Neural Networks

Lee, Jungi ; Lee, Jongeun

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-10, Vol.41 (10), p.3387-3399 [Periódico revisado por pares]

New York: IEEE

Texto completo disponível

Citações Citado por
8
Dedicated Instruction Set for Pattern-based Data Transfers: an Experimental Validation on Systems Containing In-Memory Computing Units
Dedicated Instruction Set for Pattern-based Data Transfers: an Experimental Validation on Systems Containing In-Memory Computing Units
Material Type:
Artigo 		Adicionar ao Meu Espaço

Dedicated Instruction Set for Pattern-based Data Transfers: an Experimental Validation on Systems Containing In-Memory Computing Units

Mambu, Kevin ; Charles, Henri-Pierre ; Kooli, Maha

IEEE transactions on computer-aided design of integrated circuits and systems, 2023-11, Vol.42 (11), p.1-1 [Periódico revisado por pares]

New York: IEEE

Texto completo disponível

Citações Citado por
9
TieredHM: Hotspot-Optimized Hash Indexing for Memory-Semantic SSD-Based Hybrid Memory
TieredHM: Hotspot-Optimized Hash Indexing for Memory-Semantic SSD-Based Hybrid Memory
Material Type:
Artigo 		Adicionar ao Meu Espaço

TieredHM: Hotspot-Optimized Hash Indexing for Memory-Semantic SSD-Based Hybrid Memory

Huang, Weizhou ; Zhou, Jian ; Wang, Meng ; Zhou, You ; Zhang, Xiaoyi ; Zhu, Feng ; Li, Shu ; Wang, Kun ; Wu, Fei

IEEE transactions on computer-aided design of integrated circuits and systems, 2024-06, Vol.43 (6), p.1755-1768 [Periódico revisado por pares]

New York: IEEE

Texto completo disponível

Citações Citado por
10
MCM-GPU Voltage Noise Characterization and Architecture-Level Mitigation
MCM-GPU Voltage Noise Characterization and Architecture-Level Mitigation
Material Type:
Artigo 		Adicionar ao Meu Espaço

MCM-GPU Voltage Noise Characterization and Architecture-Level Mitigation

Tan, Jingweijia ; Chen, Keyu ; Wang, Weiren ; Yan, Kaige ; Wei, Xiaohui

IEEE transactions on computer-aided design of integrated circuits and systems, 2023-12, Vol.42 (12), p.1-1 [Periódico revisado por pares]

New York: IEEE

Texto completo disponível

Citações Citado por
Resultados 1 2 3 4 5 next page

Personalize Seus Resultados

  1. Editar

Refine Search Results

Expandir Meus Resultados

  1.   

  • Realização: ABCD-USP USP   Logos de Redes Sociais: Freepik

Buscando em bases de dados remotas. Favor aguardar.