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Refinado por: Base de dados/Biblioteca: ANTE: Abstracts in New Technology & Engineering remover Nome da Publicação: Microprocessors And Microsystems remover
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1
Street architecture landscape design based on Wireless Internet of Things and GIS system
Street architecture landscape design based on Wireless Internet of Things and GIS system
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Street architecture landscape design based on Wireless Internet of Things and GIS system

Kang, Lin

Microprocessors and microsystems, 2021-02, Vol.80, p.103362, Article 103362 [Periódico revisado por pares]

Kidlington: Elsevier BV

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2
TEA: Timing and Energy Aware compression architecture for Efficient Configuration in CGRAs
TEA: Timing and Energy Aware compression architecture for Efficient Configuration in CGRAs
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TEA: Timing and Energy Aware compression architecture for Efficient Configuration in CGRAs

Jafri, Syed M.A.H. ; Daneshtalab, Masoud ; Hemani, Ahmed ; Abbas, Naeem ; Awan, Muhammad Ali ; Plosila, Juha

Microprocessors and microsystems, 2015-11, Vol.39 (8), p.973-986 [Periódico revisado por pares]

Elsevier B.V

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3
Near-memory computing: Past, present, and future
Near-memory computing: Past, present, and future
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Near-memory computing: Past, present, and future

Singh, Gagandeep ; Chelini, Lorenzo ; Corda, Stefano ; Awan, Ahsan Javed ; Stuijk, Sander ; Jordans, Roel ; Corporaal, Henk ; Boonstra, Albert-Jan

Microprocessors and microsystems, 2019-11, Vol.71, p.102868, Article 102868 [Periódico revisado por pares]

Kidlington: Elsevier B.V

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4
Floating accumulator architecture
Floating accumulator architecture
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Floating accumulator architecture

Hwang, Yuan-Shin ; Hsu, Wei-Che

Microprocessors and microsystems, 2017-06, Vol.51, p.8-17 [Periódico revisado por pares]

Kidlington: Elsevier B.V

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5
A router architecture with dual input and dual output channels for Networks-on-Chip
A router architecture with dual input and dual output channels for Networks-on-Chip
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A router architecture with dual input and dual output channels for Networks-on-Chip

Zhou, Wu ; Ouyang, Yiming ; Lu, Yingchun ; Liang, Huaguo

Microprocessors and microsystems, 2022-04, Vol.90, p.104464, Article 104464 [Periódico revisado por pares]

Kidlington: Elsevier B.V

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6
Executing secured virtual machines within a manycore architecture
Executing secured virtual machines within a manycore architecture
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Executing secured virtual machines within a manycore architecture

Dévigne, Clément ; Bréjon, Jean-Baptiste ; Meunier, Quentin L. ; Wajsbürt, Franck

Microprocessors and microsystems, 2017-02, Vol.48, p.21-35 [Periódico revisado por pares]

Kidlington: Elsevier B.V

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7
Black hole attack detection in vehicular ad-hoc network using secure AODV routing algorithm
Black hole attack detection in vehicular ad-hoc network using secure AODV routing algorithm
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Black hole attack detection in vehicular ad-hoc network using secure AODV routing algorithm

Kumar, Ankit ; Varadarajan, Vijayakumar ; Kumar, Abhishek ; Dadheech, Pankaj ; Choudhary, Surendra Singh ; Kumar, V.D. Ambeth ; Panigrahi, B.K. ; Veluvolu, Kalyana C.

Microprocessors and microsystems, 2021-02, Vol.80, p.103352, Article 103352 [Periódico revisado por pares]

Kidlington: Elsevier B.V

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8
Design and performance analysis of reconfigurable modified Vedic multiplier with 3-1-1-2 compressor
Design and performance analysis of reconfigurable modified Vedic multiplier with 3-1-1-2 compressor
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Design and performance analysis of reconfigurable modified Vedic multiplier with 3-1-1-2 compressor

Sivanandam, K. ; Kumar, P.

Microprocessors and microsystems, 2019-03, Vol.65, p.97-106 [Periódico revisado por pares]

Kidlington: Elsevier B.V

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9
Hardware Root-of-Trust-based integrity for shared library function pointers in embedded systems
Hardware Root-of-Trust-based integrity for shared library function pointers in embedded systems
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Hardware Root-of-Trust-based integrity for shared library function pointers in embedded systems

Coppock, Patrick H. ; Yacoub, Momen K. ; Qin, Bruce L. ; Daftardar, Alhad J. ; Tolaymat, Zayd ; Mooney, Vincent J.

Microprocessors and microsystems, 2020-11, Vol.79, p.103270, Article 103270 [Periódico revisado por pares]

Kidlington: Elsevier B.V

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10
A hybrid network architecture by integrating both 2.4 GHz network and Sub-GHz network and its application in field environment surveillance system
A hybrid network architecture by integrating both 2.4 GHz network and Sub-GHz network and its application in field environment surveillance system
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A hybrid network architecture by integrating both 2.4 GHz network and Sub-GHz network and its application in field environment surveillance system

Zhao, Honggang ; Oula, Hageliezi ; Zhang, Yuheng ; Shi, Chen ; Chen, Xiaoyu ; Jia, Yanyan ; Niu, Dezhi

Microprocessors and microsystems, 2022-06, Vol.91, p.104541, Article 104541 [Periódico revisado por pares]

Kidlington: Elsevier B.V

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