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On-Chip Interconnection Architecture of the Tile ProcessorWentzlaff, D. ; Griffin, P. ; Hoffmann, H. ; Liewei Bao ; Edwards, B. ; Ramey, C. ; Mattina, M. ; Chyi-Chang Miao ; Brown, J.F. ; Agarwal, A.IEEE MICRO, 2007-09, Vol.27 (5), p.15-31 [Periódico revisado por pares]Los Alamitos: IEEETexto completo disponível |
12 |
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An Efficient and Scalable Semiconductor Architecture for Parallel Automata ProcessingDlugosch, Paul ; Brown, Dave ; Glendenning, Paul ; Leventhal, Michael ; Noyes, HaroldIEEE transactions on parallel and distributed systems, 2014-12, Vol.25 (12), p.3088-3098 [Periódico revisado por pares]New York: IEEETexto completo disponível |
13 |
Material Type: Artigo
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Introduction to the Special Issue on Next-Generation On-Chip and Off-Chip Communication Architectures for Edge, Cloud and HPCKim, John ; Krishna, TusharACM journal on emerging technologies in computing systems, 2023-11, Vol.19 (4), p.1-1, Article 31 [Periódico revisado por pares]New York, NY: ACMTexto completo disponível |
14 |
Material Type: Artigo
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Gibbon: An Efficient Co-Exploration Framework of NN model and Processing-In-Memory ArchitectureSun, Hanbo ; Zhu, Zhenhua ; Wang, Chenyu ; Ning, Xuefei ; Dai, Guohao ; Yang, Huazhong ; Wang, YuIEEE transactions on computer-aided design of integrated circuits and systems, 2023-11, Vol.42 (11), p.1-1 [Periódico revisado por pares]New York: IEEETexto completo disponível |
15 |
Material Type: Artigo
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An Energy-Efficient Architecture for Binary Weight Convolutional Neural NetworksWang, Yizhi ; Lin, Jun ; Wang, ZhongfengIEEE transactions on very large scale integration (VLSI) systems, 2018-02, Vol.26 (2), p.280-293 [Periódico revisado por pares]IEEETexto completo disponível |
16 |
Material Type: Artigo
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LCHR-TSV: Novel Low Cost and Highly Repairable Honeycomb-Based TSV Redundancy Architecture for Clustered FaultsNi, Tianming ; Yao, Yao ; Chang, Hao ; Lu, Lin ; Liang, Huaguo ; Yan, Aibin ; Huang, Zhengfeng ; Wen, XiaoqingIEEE transactions on computer-aided design of integrated circuits and systems, 2020-10, Vol.39 (10), p.2938-2951 [Periódico revisado por pares]New York: IEEETexto completo disponível |
17 |
Material Type: Artigo
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Hardware-Based Trusted Computing Architectures for Isolation and AttestationMaene, Pieter ; Gotzfried, Johannes ; de Clercq, Ruan ; Muller, Tilo ; Freiling, Felix ; Verbauwhede, IngridIEEE transactions on computers, 2018-03, Vol.67 (3), p.361-374 [Periódico revisado por pares]New York: IEEETexto completo disponível |
18 |
Material Type: Artigo
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Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural AcceleratorsJiang, Weiwen ; Lou, Qiuwen ; Yan, Zheyu ; Yang, Lei ; Hu, Jingtong ; Hu, Xiaobo Sharon ; Shi, YiyuIEEE transactions on computers, 2021-04, Vol.70 (4), p.595-605 [Periódico revisado por pares]IEEETexto completo disponível |
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Material Type: Artigo
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Systematic Design of an Approximate Adder: The Optimized Lower Part Constant-OR AdderDalloo, Ayad ; Najafi, Ardalan ; Garcia-Ortiz, AlbertoIEEE transactions on very large scale integration (VLSI) systems, 2018-08, Vol.26 (8), p.1595-1599 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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Material Type: Artigo
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Architecture of Cobweb-Based Redundant TSV for Clustered FaultsNi, Tianming ; Liu, Dongsheng ; Xu, Qi ; Huang, Zhengfeng ; Liang, Huaguo ; Yan, AibinIEEE transactions on very large scale integration (VLSI) systems, 2020-07, Vol.28 (7), p.1736-1739 [Periódico revisado por pares]New York: IEEETexto completo disponível |