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1
DaDianNao: A Machine-Learning Supercomputer
Material Type:
Ata de Congresso
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DaDianNao: A Machine-Learning Supercomputer

Chen, Yunji ; Luo, Tao ; Liu, Shaoli ; Zhang, Shijin ; He, Liqiang ; Wang, Jia ; Li, Ling ; Chen, Tianshi ; Xu, Zhiwei ; Sun, Ninghui ; Temam, Olivier

2014 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014, p.609-622

IEEE Computer Society

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2
Optimizing the Convolution Operation to Accelerate Deep Neural Networks on FPGA
Material Type:
Artigo
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Optimizing the Convolution Operation to Accelerate Deep Neural Networks on FPGA

Ma, Yufei ; Cao, Yu ; Vrudhula, Sarma ; Seo, Jae-sun

IEEE transactions on very large scale integration (VLSI) systems, 2018-07, Vol.26 (7), p.1354-1367 [Periódico revisado por pares]

New York: IEEE

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3
High Throughput/Gate AES Hardware Architectures Based on Datapath Compression
Material Type:
Artigo
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High Throughput/Gate AES Hardware Architectures Based on Datapath Compression

Ueno, Rei ; Homma, Naofumi ; Morioka, Sumio ; Miura, Noriyuki ; Matsuda, Kohei ; Nagata, Makoto ; Bhasin, Shivam ; Mathieu, Yves ; Graba, Tarik ; Danger, Jean-Luc

IEEE transactions on computers, 2020-04, Vol.69 (4), p.534-548 [Periódico revisado por pares]

IEEE

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4
Introduction to the Special Issue on Next-Generation On-Chip and Off-Chip Communication Architectures for Edge, Cloud and HPC
Material Type:
Artigo
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Introduction to the Special Issue on Next-Generation On-Chip and Off-Chip Communication Architectures for Edge, Cloud and HPC

Kim, John ; Krishna, Tushar

ACM journal on emerging technologies in computing systems, 2023-11, Vol.19 (4), p.1-1, Article 31 [Periódico revisado por pares]

New York, NY: ACM

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5
Gibbon: An Efficient Co-Exploration Framework of NN model and Processing-In-Memory Architecture
Material Type:
Artigo
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Gibbon: An Efficient Co-Exploration Framework of NN model and Processing-In-Memory Architecture

Sun, Hanbo ; Zhu, Zhenhua ; Wang, Chenyu ; Ning, Xuefei ; Dai, Guohao ; Yang, Huazhong ; Wang, Yu

IEEE transactions on computer-aided design of integrated circuits and systems, 2023-11, Vol.42 (11), p.1-1 [Periódico revisado por pares]

New York: IEEE

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6
An Energy-Efficient Architecture for Binary Weight Convolutional Neural Networks
Material Type:
Artigo
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An Energy-Efficient Architecture for Binary Weight Convolutional Neural Networks

Wang, Yizhi ; Lin, Jun ; Wang, Zhongfeng

IEEE transactions on very large scale integration (VLSI) systems, 2018-02, Vol.26 (2), p.280-293 [Periódico revisado por pares]

IEEE

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7
LCHR-TSV: Novel Low Cost and Highly Repairable Honeycomb-Based TSV Redundancy Architecture for Clustered Faults
Material Type:
Artigo
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LCHR-TSV: Novel Low Cost and Highly Repairable Honeycomb-Based TSV Redundancy Architecture for Clustered Faults

Ni, Tianming ; Yao, Yao ; Chang, Hao ; Lu, Lin ; Liang, Huaguo ; Yan, Aibin ; Huang, Zhengfeng ; Wen, Xiaoqing

IEEE transactions on computer-aided design of integrated circuits and systems, 2020-10, Vol.39 (10), p.2938-2951 [Periódico revisado por pares]

New York: IEEE

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8
Hardware-Based Trusted Computing Architectures for Isolation and Attestation
Material Type:
Artigo
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Hardware-Based Trusted Computing Architectures for Isolation and Attestation

Maene, Pieter ; Gotzfried, Johannes ; de Clercq, Ruan ; Muller, Tilo ; Freiling, Felix ; Verbauwhede, Ingrid

IEEE transactions on computers, 2018-03, Vol.67 (3), p.361-374 [Periódico revisado por pares]

New York: IEEE

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9
Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural Accelerators
Material Type:
Artigo
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Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural Accelerators

Jiang, Weiwen ; Lou, Qiuwen ; Yan, Zheyu ; Yang, Lei ; Hu, Jingtong ; Hu, Xiaobo Sharon ; Shi, Yiyu

IEEE transactions on computers, 2021-04, Vol.70 (4), p.595-605 [Periódico revisado por pares]

IEEE

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10
Systematic Design of an Approximate Adder: The Optimized Lower Part Constant-OR Adder
Material Type:
Artigo
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Systematic Design of an Approximate Adder: The Optimized Lower Part Constant-OR Adder

Dalloo, Ayad ; Najafi, Ardalan ; Garcia-Ortiz, Alberto

IEEE transactions on very large scale integration (VLSI) systems, 2018-08, Vol.26 (8), p.1595-1599 [Periódico revisado por pares]

New York: IEEE

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