Result Number | Material Type | Add to My Shelf Action | Record Details and Options |
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Material Type: Ata de Congresso
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HeteroOS - OS design for heterogeneous memory management in datacenterKannan, Sudarsun ; Gavrilovska, Ada ; Gupta, Vishal ; Schwan, Karsten2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA), 2017, p.521-534ACMSem texto completo |
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Material Type: Ata de Congresso
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Fundamental limits on the precision of in-memory architecturesGonugondla, Sujan K. ; Sakr, Charbel ; Dbouk, Hassan ; Shanbhag, Naresh R.2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 2020, p.1-9New York, NY, USA: ACMTexto completo disponível |
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Material Type: Ata de Congresso
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Flip-N-Write: a simple deterministic technique to improve PRAM write performance, energy and enduranceCho, Sangyeun ; Lee, Hyunjin2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2009, p.347-357New York, NY, USA: ACMTexto completo disponível |
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Material Type: Ata de Congresso
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Fundamental Latency Trade-off in Architecting DRAM Caches: Outperforming Impractical SRAM-Tags with a Simple and Practical DesignQureshi, Moinuddin K. ; Loh, Gabe H.2012 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012, p.235-246Washington, DC, USA: IEEE Computer SocietyTexto completo disponível |
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Material Type: Ata de Congresso
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Ambit: in-memory accelerator for bulk bitwise operations using commodity DRAM technologySeshadri, Vivek ; Lee, Donghyuk ; Mullins, Thomas ; Hassan, Hasan ; Boroumand, Amirali ; Kim, Jeremie ; Kozuch, Michael A. ; Mutlu, Onur ; Gibbons, Phillip B. ; Mowry, Todd C.2017 50th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2017, p.273-287New York, NY, USA: ACMTexto completo disponível |
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Material Type: Ata de Congresso
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PRIME: A Novel Processing-in-Memory Architecture for Neural Network Computation in ReRAM-Based Main MemoryPing Chi ; Shuangchen Li ; Cong Xu ; Tao Zhang ; Jishen Zhao ; Yongpan Liu ; Yu Wang ; Yuan Xie2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA), 2016, p.27-39IEEESem texto completo |
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Material Type: Ata de Congresso
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Hardware Architecture and Software Stack for PIM Based on Commercial DRAM Technology : Industrial ProductLee, Sukhan ; Kang, Shin-haeng ; Lee, Jaehoon ; Kim, Hyeonsu ; Lee, Eojin ; Seo, Seungwoo ; Yoon, Hosang ; Lee, Seungwon ; Lim, Kyounghwan ; Shin, Hyunsung ; Kim, Jinhyun ; Seongil, O ; Iyer, Anand ; Wang, David ; Sohn, Kyomin ; Kim, Nam Sung2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA), 2021, p.43-56IEEESem texto completo |
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Material Type: Ata de Congresso
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Transitioning eMRAM from Pilot Project to Volume ProductionDray, Cyrille ; Gelda, Khushal ; Nadeau-Dostie, Benoit ; Zou, Wei ; Romain, Luc ; Yun, Ongsin ; Kodali, Harshitha ; Schramm, Lori ; Keim, Martin2023 IEEE International Test Conference (ITC), 2023, p.82-86IEEESem texto completo |
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Material Type: Ata de Congresso
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H2M: Towards Heuristics for Heterogeneous MemoryFoyer, Clement ; Goglin, Brice ; Jeannot, Emmanuel ; Klinkenberg, Jannis ; Kozhokanova, Anara ; Terboven, Christian2022 IEEE International Conference on Cluster Computing (CLUSTER), 2022, p.498-499IEEESem texto completo |
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10 |
Material Type: Ata de Congresso
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HiRA: Hidden Row Activation for Reducing Refresh Latency of Off-the-Shelf DRAM ChipsYağlıkçı, A. Giray ; Olgun, Ataberk ; Patel, Minesh ; Luo, Haocong ; Hassan, Hasan ; Orosa, Lois ; Ergin, Oğuz ; Mutlu, Onur2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), 2022, p.815-834Piscataway, NJ, USA: IEEE PressSem texto completo |