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Fundamental Limits on the Precision of In-memory Architectures
Fundamental Limits on the Precision of In-memory Architectures
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Ata de Congresso 		Adicionar ao Meu Espaço

Fundamental Limits on the Precision of In-memory Architectures

Gonugondla, Sujan K. ; Sakr, Charbel ; Dbouk, Hassan ; Shanbhag, Naresh R.

2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 2020, p.1-9

Association on Computer Machinery

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Ambit: in-memory accelerator for bulk bitwise operations using commodity DRAM technology
Ambit: in-memory accelerator for bulk bitwise operations using commodity DRAM technology
Material Type:
Ata de Congresso 		Adicionar ao Meu Espaço

Ambit: in-memory accelerator for bulk bitwise operations using commodity DRAM technology

Seshadri, Vivek ; Lee, Donghyuk ; Mullins, Thomas ; Hassan, Hasan ; Boroumand, Amirali ; Kim, Jeremie ; Kozuch, Michael A. ; Mutlu, Onur ; Gibbons, Phillip B. ; Mowry, Todd C.

2017 50th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2017, p.273-287

New York, NY, USA: ACM

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3
A software memory partition approach for eliminating bank-level interference in multicore systems
A software memory partition approach for eliminating bank-level interference in multicore systems
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A software memory partition approach for eliminating bank-level interference in multicore systems

Liu, Lei ; Cui, Zehan ; Xing, Mingjie ; Bao, Yungang ; Chen, Mingyu ; Wu, Chengyong

2012 21st International Conference on Parallel Architectures and Compilation Techniques (PACT), 2012, p.367-376

New York, NY, USA: ACM

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4
3D-Stacked Memory Architectures for Multi-core Processors
3D-Stacked Memory Architectures for Multi-core Processors
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3D-Stacked Memory Architectures for Multi-core Processors

Loh, Gabriel H.

2008 International Symposium on Computer Architecture, 2008, p.453-464

Washington, DC, USA: IEEE Computer Society

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5
FELIX: Fast and Energy-Efficient Logic in Memory
FELIX: Fast and Energy-Efficient Logic in Memory
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FELIX: Fast and Energy-Efficient Logic in Memory

Gupta, Saransh ; Imani, Mohsen ; Rosing, Tajana

2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2018, p.1-7

ACM

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6
Parallelism-Aware Batch Scheduling: Enhancing both Performance and Fairness of Shared DRAM Systems
Parallelism-Aware Batch Scheduling: Enhancing both Performance and Fairness of Shared DRAM Systems
Material Type:
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Parallelism-Aware Batch Scheduling: Enhancing both Performance and Fairness of Shared DRAM Systems

Mutlu, Onur ; Moscibroda, Thomas

2008 International Symposium on Computer Architecture, 2008, p.63-74

Washington, DC, USA: IEEE Computer Society

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7
Flexible auto-refresh: enabling scalable and energy-efficient DRAM refresh reductions
Flexible auto-refresh: enabling scalable and energy-efficient DRAM refresh reductions
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Flexible auto-refresh: enabling scalable and energy-efficient DRAM refresh reductions

Bhati, Ishwar ; Chishti, Zeshan ; Lu, Shih-Lien ; Jacob, Bruce

Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015, p.235-246

New York, NY, USA: ACM

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8
Improving NAND Flash Based Disk Caches
Improving NAND Flash Based Disk Caches
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Improving NAND Flash Based Disk Caches

Kgil, Taeho ; Roberts, David ; Mudge, Trevor

2008 International Symposium on Computer Architecture, 2008, p.327-338

Washington, DC, USA: IEEE Computer Society

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9
PDRAM: a hybrid PRAM and DRAM main memory system
PDRAM: a hybrid PRAM and DRAM main memory system
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PDRAM: a hybrid PRAM and DRAM main memory system

Dhiman, Gaurav ; Ayoub, Raid ; Rosing, Tajana

2009 46th ACM/IEEE Design Automation Conference, 2009, p.664-469

New York, NY, USA: ACM

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10
Data reorganization in memory using 3D-stacked DRAM
Data reorganization in memory using 3D-stacked DRAM
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Data reorganization in memory using 3D-stacked DRAM

Akin, Berkin ; Franchetti, Franz ; Hoe, James C.

Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015, p.131-143

New York, NY, USA: ACM

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