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An architecture interface and offload model for low-overhead, near-data, distributed accelerators
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An architecture interface and offload model for low-overhead, near-data, distributed accelerators

Baskaran, Saambhavi ; Kandemir, Mahmut Taylan ; Sampson, Jack

2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), 2022, p.1160-1177

IEEE

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2
Gibbon: An Efficient Co-Exploration Framework of NN model and Processing-In-Memory Architecture
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Gibbon: An Efficient Co-Exploration Framework of NN model and Processing-In-Memory Architecture

Sun, Hanbo ; Zhu, Zhenhua ; Wang, Chenyu ; Ning, Xuefei ; Dai, Guohao ; Yang, Huazhong ; Wang, Yu

IEEE transactions on computer-aided design of integrated circuits and systems, 2023-11, Vol.42 (11), p.1-1 [Periódico revisado por pares]

New York: IEEE

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3
Towards Accurate and Compact Architectures via Neural Architecture Transformer
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Towards Accurate and Compact Architectures via Neural Architecture Transformer

Guo, Yong ; Zheng, Yin ; Tan, Mingkui ; Chen, Qi ; Li, Zhipeng ; Chen, Jian ; Zhao, Peilin ; Huang, Junzhou

IEEE transactions on pattern analysis and machine intelligence, 2022-10, Vol.44 (10), p.6501-6516 [Periódico revisado por pares]

United States: IEEE

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4
Automatic Searching and Pruning of Deep Neural Networks for Medical Imaging Diagnostic
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Automatic Searching and Pruning of Deep Neural Networks for Medical Imaging Diagnostic

Fernandes, Francisco Erivaldo ; Yen, Gary G.

IEEE transaction on neural networks and learning systems, 2021-12, Vol.32 (12), p.5664-5674

United States: IEEE

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5
Deep Convolutional Neural Network Architecture With Reconfigurable Computation Patterns
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Deep Convolutional Neural Network Architecture With Reconfigurable Computation Patterns

Tu, Fengbin ; Yin, Shouyi ; Ouyang, Peng ; Tang, Shibin ; Liu, Leibo ; Wei, Shaojun

IEEE transactions on very large scale integration (VLSI) systems, 2017-08, Vol.25 (8), p.2220-2233 [Periódico revisado por pares]

New York: IEEE

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6
Z-PIM: A Sparsity-Aware Processing-in-Memory Architecture With Fully Variable Weight Bit-Precision for Energy-Efficient Deep Neural Networks
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Z-PIM: A Sparsity-Aware Processing-in-Memory Architecture With Fully Variable Weight Bit-Precision for Energy-Efficient Deep Neural Networks

Kim, Ji-Hoon ; Lee, Juhyoung ; Lee, Jinsu ; Heo, Jaehoon ; Kim, Joo-Young

IEEE journal of solid-state circuits, 2021-04, Vol.56 (4), p.1093-1104 [Periódico revisado por pares]

New York: IEEE

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7
DNNExplorer: A Framework for Modeling and Exploring a Novel Paradigm of FPGA-based DNN Accelerator
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DNNExplorer: A Framework for Modeling and Exploring a Novel Paradigm of FPGA-based DNN Accelerator

Zhang, Xiaofan ; Ye, Hanchen ; Wang, Junsong ; Lin, Yonghua ; Xiong, Jinjun ; Hwu, Wen-Mei ; Chen, Deming

2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 2020, p.1-9

Association on Computer Machinery

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8
NPENAS: Neural Predictor Guided Evolution for Neural Architecture Search
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NPENAS: Neural Predictor Guided Evolution for Neural Architecture Search

Wei, Chen ; Niu, Chuang ; Tang, Yiping ; Wang, Yue ; Hu, Haihong ; Liang, Jimin

IEEE transaction on neural networks and learning systems, 2023-11, Vol.34 (11), p.8441-8455

United States: IEEE

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9
Adversarial Examples: Attacks and Defenses for Deep Learning
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Adversarial Examples: Attacks and Defenses for Deep Learning

Yuan, Xiaoyong ; He, Pan ; Zhu, Qile ; Li, Xiaolin

IEEE transaction on neural networks and learning systems, 2019-09, Vol.30 (9), p.2805-2824

United States: IEEE

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10
A configurable cloud-scale DNN processor for real-time AI
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A configurable cloud-scale DNN processor for real-time AI

Fowers, Jeremy ; Ovtcharov, Kalin ; Papamichael, Michael ; Massengill, Todd ; Liu, Ming ; Lo, Daniel ; Alkalay, Shlomi ; Haselman, Michael ; Adams, Logan ; Ghandi, Mahdi ; Heil, Stephen ; Patel, Prerak ; Sapek, Adam ; Weisz, Gabriel ; Woods, Lisa ; Lanka, Sitaram ; Reinhardt, Steven ; Caulfield, Adrian ; Chung, Eric ; Burger, Doug

2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture (ISCA), 2018, p.1-14

IEEE Press

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