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Origins of anomalous transport in heterogeneous media: Structural and dynamic controls
Origins of anomalous transport in heterogeneous media: Structural and dynamic controls
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Origins of anomalous transport in heterogeneous media: Structural and dynamic controls

Edery, Yaniv ; Guadagnini, Alberto ; Scher, Harvey ; Berkowitz, Brian

Water resources research, 2014-02, Vol.50 (2), p.1490-1505 [Periódico revisado por pares]

Washington: Blackwell Publishing Ltd

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Critical Path Based Microarchitectural Bottleneck Analysis for Out-of-Order Execution
Critical Path Based Microarchitectural Bottleneck Analysis for Out-of-Order Execution
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Critical Path Based Microarchitectural Bottleneck Analysis for Out-of-Order Execution

TANIMOTO, Teruo ; ONO, Takatsugu ; INOUE, Koji

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2019/06/01, Vol.E102.A(6), pp.758-766 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

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3
Critical-Path Analysis and Low-Complexity Implementation of the LMS Adaptive Algorithm
Critical-Path Analysis and Low-Complexity Implementation of the LMS Adaptive Algorithm
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Critical-Path Analysis and Low-Complexity Implementation of the LMS Adaptive Algorithm

Meher, Pramod Kumar ; Sang Yoon Park

IEEE transactions on circuits and systems. I, Regular papers, 2014-03, Vol.61 (3), p.778-788 [Periódico revisado por pares]

New York: IEEE

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4
A full matrix joint optimization method for hardware implementation of AES MixColumns/InvMixColumns
A full matrix joint optimization method for hardware implementation of AES MixColumns/InvMixColumns
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A full matrix joint optimization method for hardware implementation of AES MixColumns/InvMixColumns

ZHANG, Xiaoqiang ; YANG, Fan ; ZHENG, Xinxing ; ZHANG, Xinggan ; WU, Ning

IEICE Electronics Express, 2020-12, Vol.17 (24), p.20200391-20200391 [Periódico revisado por pares]

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5
Causes influencing the effectiveness of the post-implementation ERP system
Causes influencing the effectiveness of the post-implementation ERP system
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Causes influencing the effectiveness of the post-implementation ERP system

Yu, Chian-Son

Industrial management + data systems, 2005-01, Vol.105 (1), p.115-132 [Periódico revisado por pares]

Wembley: Emerald Group Publishing Limited

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6
Critical Path Isolation and Bit-Width Scaling Are Highly Compatible for Voltage Over-Scalable Design
Critical Path Isolation and Bit-Width Scaling Are Highly Compatible for Voltage Over-Scalable Design
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Critical Path Isolation and Bit-Width Scaling Are Highly Compatible for Voltage Over-Scalable Design

Masuda, Yutaka ; Nagayama, Jun ; Cheng, TaiYu ; Ishihara, Tohru ; Momiyama, Yoichi ; Hashimoto, Masanori

2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2021, p.1260-1265

EDAA

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7
Comparison of critical success paths for historic district renovation and redevelopment projects in China
Comparison of critical success paths for historic district renovation and redevelopment projects in China
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Comparison of critical success paths for historic district renovation and redevelopment projects in China

Zhou, Tao ; Zhou, Yulin ; Liu, Guiwen

Habitat international, 2017-09, Vol.67, p.54-68 [Periódico revisado por pares]

Elsevier Ltd

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8
Extraction Algorithm for Unpredictable Delays in Train Traffic Disruption Using Train Operation Simulation
Extraction Algorithm for Unpredictable Delays in Train Traffic Disruption Using Train Operation Simulation
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Extraction Algorithm for Unpredictable Delays in Train Traffic Disruption Using Train Operation Simulation

Kato, Satoshi ; Sakaguchi, Takashi ; Nakamura, Tatsuya ; Kishishita, Yoshihide

IEEJ Transactions on Industry Applications, 2018/02/01, Vol.138(2), pp.76-83

Tokyo: The Institute of Electrical Engineers of Japan

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Variation-Aware Adaptive Voltage Scaling System
Variation-Aware Adaptive Voltage Scaling System
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Variation-Aware Adaptive Voltage Scaling System

Elgebaly, M. ; Sachdev, M.

IEEE transactions on very large scale integration (VLSI) systems, 2007-05, Vol.15 (5), p.560-571 [Periódico revisado por pares]

Piscataway, NJ: IEEE

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10
Impact of Die-to-Die and Within-Die Parameter Variations on the Clock Frequency and Throughput of Multi-Core Processors
Impact of Die-to-Die and Within-Die Parameter Variations on the Clock Frequency and Throughput of Multi-Core Processors
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Impact of Die-to-Die and Within-Die Parameter Variations on the Clock Frequency and Throughput of Multi-Core Processors

Bowman, K.A. ; Alameldeen, A.R. ; Srinivasan, S.T. ; Wilkerson, C.B.

IEEE transactions on very large scale integration (VLSI) systems, 2009-12, Vol.17 (12), p.1679-1690 [Periódico revisado por pares]

New York, NY: IEEE

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