Result Number | Material Type | Add to My Shelf Action | Record Details and Options |
---|---|---|---|
1 |
Material Type: Artigo
|
![]() |
Scheduling master-slave multiprocessor systemsSahni, S.IEEE transactions on computers, 1996-10, Vol.45 (10), p.1195-1199 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
2 |
Material Type: Ata de Congresso
|
![]() |
Ge photodetectors integrated in CMOS photonic circuitsMasini, G ; Sahni, S ; Capellini, G ; Witzens, J ; White, J ; Song, D ; Gunn, CProceedings of SPIE, the International Society for Optical Engineering, 2008, Vol.6898, p.689808-689808-6Bellingham, Wash: SPIESem texto completo |
3 |
Material Type: Ata de Congresso
|
![]() |
Dynamic IP router-tables using highest-priority matchingLu, H. ; Sahni, S.Proceedings. ISCC 2004. Ninth International Symposium on Computers And Communications (IEEE Cat. No.04TH8769), 2004, Vol.2, p.858-863 Vol.2Los Alamitos CA: IEEETexto completo disponível |
4 |
Material Type: Ata de Congresso
|
![]() |
A B-tree dynamic router-table designLu, H. ; Sahni, S.Proceedings. ISCC 2004. Ninth International Symposium on Computers And Communications (IEEE Cat. No.04TH8769), 2004, Vol.2, p.840-845 Vol.2Los Alamitos CA: IEEETexto completo disponível |
5 |
Material Type: Artigo
|
![]() |
Efficient Algorithms for Computing With Protein-Based Volumetric Memory ProcessorsRajasekaran, S. ; Kundeti, V. ; Birge, R. ; Kumar, V. ; Sahni, S.IEEE transactions on nanotechnology, 2011-07, Vol.10 (4), p.881-890 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
6 |
Material Type: Artigo
|
![]() |
Deleting vertices to bound path lengthPaik, D. ; Reddy, S. ; Sahni, S.IEEE transactions on computers, 1994-09, Vol.43 (9), p.1091-1096 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
7 |
Material Type: Artigo
|
![]() |
Serial and parallel algorithms for the medial axis transformJenq, J.-F. ; Sahni, S.IEEE transactions on pattern analysis and machine intelligence, 1992-12, Vol.14 (12), p.1218-1224 [Periódico revisado por pares]LOS ALAMITOS: IEEETexto completo disponível |
8 |
Material Type: Artigo
|
![]() |
Planar topological routingLim, A. ; Thanvantri, V. ; Sahni, S.IEEE transactions on computer-aided design of integrated circuits and systems, 1997-06, Vol.16 (6), p.651-656 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
9 |
Material Type: Artigo
|
![]() |
Optimal realizations of floorplans (VLSI layout)Chong, K. ; Sahni, S.IEEE transactions on computer-aided design of integrated circuits and systems, 1993-06, Vol.12 (6), p.793-801 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
10 |
Material Type: Artigo
|
![]() |
Folding a stack of equal width componentsThanvantri, V. ; Sahni, S.IEEE transactions on computer-aided design of integrated circuits and systems, 1995-06, Vol.14 (6), p.775-780 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |