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Low-Power and Low-Noise Millimeter-Wave SSPLL With Subsampling Lock Detector for Automatic Dividerless Frequency Acquisition
Low-Power and Low-Noise Millimeter-Wave SSPLL With Subsampling Lock Detector for Automatic Dividerless Frequency Acquisition
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Low-Power and Low-Noise Millimeter-Wave SSPLL With Subsampling Lock Detector for Automatic Dividerless Frequency Acquisition

Wang, Hao ; Momeni, Omeed

IEEE transactions on microwave theory and techniques, 2021-01, Vol.69 (1), p.469-481 [Periódico revisado por pares]

New York: IEEE

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2
A Fully Integrated 0.27-THz Injection-Locked Frequency Synthesizer With Frequency-Tracking Loop in 65-nm CMOS
A Fully Integrated 0.27-THz Injection-Locked Frequency Synthesizer With Frequency-Tracking Loop in 65-nm CMOS
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A Fully Integrated 0.27-THz Injection-Locked Frequency Synthesizer With Frequency-Tracking Loop in 65-nm CMOS

Liu, Xiaolong ; Luong, Howard C.

IEEE journal of solid-state circuits, 2020-04, Vol.55 (4), p.1051-1063 [Periódico revisado por pares]

New York: IEEE

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3
A 2.5-GHz Dynamic Performance-Enhanced Nonlinear DAC-Based Direct-Digital Frequency Synthesizer in 65-nm CMOS Process
A 2.5-GHz Dynamic Performance-Enhanced Nonlinear DAC-Based Direct-Digital Frequency Synthesizer in 65-nm CMOS Process
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A 2.5-GHz Dynamic Performance-Enhanced Nonlinear DAC-Based Direct-Digital Frequency Synthesizer in 65-nm CMOS Process

Yoon, Dong-Hyun ; Baek, Kwang-Hyun ; Kim, Tony Tae-Hyoung

IEEE journal of solid-state circuits, 2024-07, Vol.59 (7), p.2185-2198 [Periódico revisado por pares]

IEEE

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4
An Ultra-Low-Jitter, mmW-Band Frequency Synthesizer Based on Digital Subsampling PLL Using Optimally Spaced Voltage Comparators
An Ultra-Low-Jitter, mmW-Band Frequency Synthesizer Based on Digital Subsampling PLL Using Optimally Spaced Voltage Comparators
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An Ultra-Low-Jitter, mmW-Band Frequency Synthesizer Based on Digital Subsampling PLL Using Optimally Spaced Voltage Comparators

Kim, Juyeop ; Lim, Younghyun ; Yoon, Heein ; Lee, Yongsun ; Park, Hangi ; Cho, Yoonseo ; Seong, Taeho ; Choi, Jaehyouk

IEEE journal of solid-state circuits, 2019-12, Vol.54 (12), p.3466-3477 [Periódico revisado por pares]

New York: IEEE

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5
A 12.5-GHz Fractional-N Type-I Sampling PLL Achieving 58-fs Integrated Jitter
A 12.5-GHz Fractional-N Type-I Sampling PLL Achieving 58-fs Integrated Jitter
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A 12.5-GHz Fractional-N Type-I Sampling PLL Achieving 58-fs Integrated Jitter

Mercandelli, Mario ; Santiccioli, Alessio ; Parisi, Angelo ; Bertulessi, Luca ; Cherniak, Dmytro ; Lacaita, Andrea L. ; Samori, Carlo ; Levantino, Salvatore

IEEE journal of solid-state circuits, 2022-02, Vol.57 (2), p.505-517 [Periódico revisado por pares]

New York: IEEE

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6
A Cryo-CMOS Wideband Quadrature Receiver With Frequency Synthesizer for Scalable Multiplexed Readout of Silicon Spin Qubits
A Cryo-CMOS Wideband Quadrature Receiver With Frequency Synthesizer for Scalable Multiplexed Readout of Silicon Spin Qubits
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A Cryo-CMOS Wideband Quadrature Receiver With Frequency Synthesizer for Scalable Multiplexed Readout of Silicon Spin Qubits

Peng, Yatao ; Ruffino, Andrea ; Yang, Tsung-Yeh ; Michniewicz, John ; Gonzalez-Zalba, Miguel Fernando ; Charbon, Edoardo

IEEE journal of solid-state circuits, 2022-08, Vol.57 (8), p.2374-2389 [Periódico revisado por pares]

New York: IEEE

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7
A Self-Calibrated 2-bit Time-Period Comparator-Based Synthesized Fractional-N MDLL in 22-nm FinFET CMOS
A Self-Calibrated 2-bit Time-Period Comparator-Based Synthesized Fractional-N MDLL in 22-nm FinFET CMOS
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A Self-Calibrated 2-bit Time-Period Comparator-Based Synthesized Fractional-N MDLL in 22-nm FinFET CMOS

Kundu, Somnath ; Chai, Likai ; Chandrashekar, Kailash ; Pellerano, Stefano ; Carlton, Brent R.

IEEE journal of solid-state circuits, 2021-01, Vol.56 (1), p.43-54 [Periódico revisado por pares]

New York: IEEE

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8
Analysis and Design of a Dual-Mode VCO With Inherent Mode Compensation Enabling a 7.9-14.3-GHz 85-fs-rms Jitter PLL
Analysis and Design of a Dual-Mode VCO With Inherent Mode Compensation Enabling a 7.9-14.3-GHz 85-fs-rms Jitter PLL
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Analysis and Design of a Dual-Mode VCO With Inherent Mode Compensation Enabling a 7.9-14.3-GHz 85-fs-rms Jitter PLL

Wang, Yizhuo ; Shi, Jiahe ; Xu, Hao ; Ji, Shujiang ; Mao, Yiyun ; Zou, Tenghao ; Tao, Jun ; Min, Hao ; Yan, Na

IEEE journal of solid-state circuits, 2023-08, Vol.58 (8), p.2252-2266 [Periódico revisado por pares]

New York: IEEE

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9
A 22.5-31.2-GHz Continuously Tuning Frequency Synthesizer With 8.7-GHz Chirp for FMCW Applications
A 22.5-31.2-GHz Continuously Tuning Frequency Synthesizer With 8.7-GHz Chirp for FMCW Applications
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A 22.5-31.2-GHz Continuously Tuning Frequency Synthesizer With 8.7-GHz Chirp for FMCW Applications

Chen, Bowen ; Luo, Wei ; Wang, Fuyue ; Lin, Yue ; Yan, Na ; Xu, Hongtao

IEEE microwave and wireless components letters, 2020-09, Vol.30 (9), p.904-907 [Periódico revisado por pares]

IEEE

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10
A 50-66-GHz Phase-Domain Digital Frequency Synthesizer With Low Phase Noise and Low Fractional Spurs
A 50-66-GHz Phase-Domain Digital Frequency Synthesizer With Low Phase Noise and Low Fractional Spurs
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A 50-66-GHz Phase-Domain Digital Frequency Synthesizer With Low Phase Noise and Low Fractional Spurs

Hussein, Ahmed I. ; Vasadi, Sriharsha ; Paramesh, Jeyanandh

IEEE journal of solid-state circuits, 2017-12, Vol.52 (12), p.3329-3347 [Periódico revisado por pares]

New York: IEEE

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