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Refinado por: Nome da Publicação: Ieee Transactions On Very Large Scale Integration remover
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11
FEECA: Design Space Exploration for Low-Latency and Energy-Efficient Capsule Network Accelerators
FEECA: Design Space Exploration for Low-Latency and Energy-Efficient Capsule Network Accelerators
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FEECA: Design Space Exploration for Low-Latency and Energy-Efficient Capsule Network Accelerators

Marchisio, Alberto ; Mrazek, Vojtech ; Hanif, Muhammad Abdullah ; Shafique, Muhammad

IEEE transactions on very large scale integration (VLSI) systems, 2021-04, Vol.29 (4), p.716-729 [Periódico revisado por pares]

New York: IEEE

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12
ROMANet: Fine-Grained Reuse-Driven Off-Chip Memory Access Management and Data Organization for Deep Neural Network Accelerators
ROMANet: Fine-Grained Reuse-Driven Off-Chip Memory Access Management and Data Organization for Deep Neural Network Accelerators
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ROMANet: Fine-Grained Reuse-Driven Off-Chip Memory Access Management and Data Organization for Deep Neural Network Accelerators

Putra, Rachmad Vidya Wicaksana ; Hanif, Muhammad Abdullah ; Shafique, Muhammad

IEEE transactions on very large scale integration (VLSI) systems, 2021-04, Vol.29 (4), p.702-715 [Periódico revisado por pares]

New York: IEEE

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13
Exposing Approximate Computing Optimizations at Different Levels: From Behavioral to Gate-Level
Exposing Approximate Computing Optimizations at Different Levels: From Behavioral to Gate-Level
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Exposing Approximate Computing Optimizations at Different Levels: From Behavioral to Gate-Level

Siyuan Xu ; Schafer, Benjamin Carrion

IEEE transactions on very large scale integration (VLSI) systems, 2017-11, Vol.25 (11), p.3077-3088 [Periódico revisado por pares]

IEEE

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14
High-Speed Parallel LFSR Architectures Based on Improved State-Space Transformations
High-Speed Parallel LFSR Architectures Based on Improved State-Space Transformations
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High-Speed Parallel LFSR Architectures Based on Improved State-Space Transformations

Hu, Guanghui ; Sha, Jin ; Wang, Zhongfeng

IEEE transactions on very large scale integration (VLSI) systems, 2017-03, Vol.25 (3), p.1159-1163 [Periódico revisado por pares]

IEEE

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15
Synthesis of Approximate Parallel-Prefix Adders
Synthesis of Approximate Parallel-Prefix Adders
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Synthesis of Approximate Parallel-Prefix Adders

Stefanidis, Apostolos ; Zoumpoulidou, Ioanna ; Filippas, Dionysios ; Dimitrakopoulos, Giorgos ; Sirakoulis, Georgios Ch

IEEE transactions on very large scale integration (VLSI) systems, 2023-11, Vol.31 (11), p.1-14 [Periódico revisado por pares]

New York: IEEE

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16
Low-Complexity VLSI Architecture for OTFS Transceiver Under Multipath Fading Channel
Low-Complexity VLSI Architecture for OTFS Transceiver Under Multipath Fading Channel
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Low-Complexity VLSI Architecture for OTFS Transceiver Under Multipath Fading Channel

Shadangi, Ashish Ranjan ; Das, Suvra Sekhar ; Chakrabarti, Indrajit

IEEE transactions on very large scale integration (VLSI) systems, 2024, p.1-12 [Periódico revisado por pares]

IEEE

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17
"It's a small world after all": NoC performance optimization via long-range link insertion
"It's a small world after all": NoC performance optimization via long-range link insertion
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"It's a small world after all": NoC performance optimization via long-range link insertion

Ogras, U.Y. ; Marculescu, R.

IEEE transactions on very large scale integration (VLSI) systems, 2006-07, Vol.14 (7), p.693-706 [Periódico revisado por pares]

Piscataway, NJ: IEEE

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18
Fast Performance Analysis for NoCs With Weighted Round-Robin Arbitration and Finite Buffers
Fast Performance Analysis for NoCs With Weighted Round-Robin Arbitration and Finite Buffers
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Fast Performance Analysis for NoCs With Weighted Round-Robin Arbitration and Finite Buffers

Mandal, Sumit K. ; Narayana, Shruti Yadav ; Ayoub, Raid ; Kishinevsky, Michael ; Abousamra, Ahmed ; Ogras, Umit Y.

IEEE transactions on very large scale integration (VLSI) systems, 2023-05, Vol.31 (5), p.1-14 [Periódico revisado por pares]

New York: IEEE

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19
Stream Processing Architectures for Continuous ECG Monitoring Using Subsampling- Based Classifiers
Stream Processing Architectures for Continuous ECG Monitoring Using Subsampling- Based Classifiers
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Stream Processing Architectures for Continuous ECG Monitoring Using Subsampling- Based Classifiers

Loh, Johnson ; Gemmeke, Tobias

IEEE transactions on very large scale integration (VLSI) systems, 2024-01, Vol.32 (1), p.68-78 [Periódico revisado por pares]

New York: IEEE

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20
Electronics and Packaging Intended for Emerging Harsh Environment Applications: A Review
Electronics and Packaging Intended for Emerging Harsh Environment Applications: A Review
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Electronics and Packaging Intended for Emerging Harsh Environment Applications: A Review

Hassan, Ahmad ; Savaria, Yvon ; Sawan, Mohamad

IEEE transactions on very large scale integration (VLSI) systems, 2018-10, Vol.26 (10), p.2085-2098 [Periódico revisado por pares]

New York: IEEE

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