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Refinado por: Base de dados/Biblioteca: ANTE: Abstracts in New Technology & Engineering remover assunto: Materials Science, Multidisciplinary remover Materials Science remover Ieee Transactions On Nanotechnology remover
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Optimization of single-gate carbon-nanotube field-effect transistors
Optimization of single-gate carbon-nanotube field-effect transistors
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Optimization of single-gate carbon-nanotube field-effect transistors

Ungersboeck, E. ; Pourfath, M. ; Kosina, H. ; Gehring, A. ; Byoung-Ho Cheong ; Wan-Jun Park ; Selberherr, S.

IEEE transactions on nanotechnology, 2005-09, Vol.4 (5), p.533-538 [Periódico revisado por pares]

New York, NY: IEEE

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2
SOI single-electron transistor with low RC delay for logic cells and SET/FET hybrid ICs
SOI single-electron transistor with low RC delay for logic cells and SET/FET hybrid ICs
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SOI single-electron transistor with low RC delay for logic cells and SET/FET hybrid ICs

PARK, Kyu-Sul ; KIM, Sang-Jin ; PARK, Keun-Hyung ; CHO, Won-Ju ; JANG, Moon-Gyu ; LEE, Seong-Jae ; BAEK, In-Bok ; LEE, Won-Hee ; KANG, Jong-Seuk ; JO, Yong-Bum ; SANG DON LEE ; LEE, Chang-Keun ; CHOI, Jung-Bum ; KIM, Jang-Han

IEEE transactions on nanotechnology, 2005-03, Vol.4 (2), p.242-248 [Periódico revisado por pares]

New York, NY: IEEE

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3
Design optimization of gate-all-around (GAA) MOSFETs
Design optimization of gate-all-around (GAA) MOSFETs
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Design optimization of gate-all-around (GAA) MOSFETs

Song, Jae Young ; Choi, Woo Young ; Park, Ju Hee ; Lee, Jong Duk ; Park, Byung-Gook

IEEE transactions on nanotechnology, 2006-05, Vol.5 (3), p.186-191 [Periódico revisado por pares]

New York, NY: IEEE

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4
A novel biasing scheme for I-MOS (impact-ionization MOS) devices
A novel biasing scheme for I-MOS (impact-ionization MOS) devices
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A novel biasing scheme for I-MOS (impact-ionization MOS) devices

Woo Young Choi ; Jae Young Song ; Jong Duk Lee ; Park, Y.J. ; Byung-Gook Park

IEEE transactions on nanotechnology, 2005-05, Vol.4 (3), p.322-325 [Periódico revisado por pares]

New York, NY: IEEE

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5
Electron transport in nanocluster films with random voids
Electron transport in nanocluster films with random voids
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Electron transport in nanocluster films with random voids

Rendell, R.W. ; Ancona, M.G. ; Kruppa, W. ; Foos, E.E. ; Snow, A.W. ; Park, D. ; Boos, J.B.

IEEE transactions on nanotechnology, 2003-06, Vol.2 (2), p.75-81 [Periódico revisado por pares]

New York, NY: IEEE

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6
Fabrication and program/erase characteristics of 30-nm SONOS nonvolatile memory devices
Fabrication and program/erase characteristics of 30-nm SONOS nonvolatile memory devices
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Fabrication and program/erase characteristics of 30-nm SONOS nonvolatile memory devices

Sung, Suk-Kang ; Park, Il-Han ; Lee, Chang Ju ; Lee, Yong Kyu ; Lee, Jong Duk ; Park, Byung-Gook ; Chae, Soo Doo ; Kim, Chung Woo

IEEE transactions on nanotechnology, 2003-12, Vol.2 (4), p.258-264 [Periódico revisado por pares]

New York, NY: IEEE

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7
A novel multibridge-channel MOSFET (MBCFET): fabrication technologies and characteristics
A novel multibridge-channel MOSFET (MBCFET): fabrication technologies and characteristics
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A novel multibridge-channel MOSFET (MBCFET): fabrication technologies and characteristics

LEE, Sung-Young ; KIM, Sung-Min ; YOON, Eun-Jung ; OH, Chang-Woo ; CHUNG, Ilsub ; PARK, Donggun ; KIM, Kinam

IEEE transactions on nanotechnology, 2003-12, Vol.2 (4), p.253-257 [Periódico revisado por pares]

New York, NY: IEEE

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8
Field-induced interband tunneling effect transistor (FITET) with negative-differential transconductance and negative-differential conductance
Field-induced interband tunneling effect transistor (FITET) with negative-differential transconductance and negative-differential conductance
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Field-induced interband tunneling effect transistor (FITET) with negative-differential transconductance and negative-differential conductance

Kim, K.R. ; Kim, H.H. ; Song, K.W. ; Huh, J.I. ; Lee, J.D. ; Park, B.G.

IEEE transactions on nanotechnology, 2005-05, Vol.4 (3), p.317-321 [Periódico revisado por pares]

New York: IEEE

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9
Electrical characteristics of FinFET with vertically nonuniform source/drain doping profile
Electrical characteristics of FinFET with vertically nonuniform source/drain doping profile
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Electrical characteristics of FinFET with vertically nonuniform source/drain doping profile

WOO, Dong-Soo ; LEE, Jong-Ho ; WOO YOUNG CHOI ; CHOI, Byung-Yong ; CHOI, Young-Jin ; JONG DUK LEE ; PARK, Byung-Gook

IEEE transactions on nanotechnology, 2002-12, Vol.1 (4), p.233-237 [Periódico revisado por pares]

New York, NY: IEEE

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10
Reverse-order source/drain formation with double offset spacer (RODOS) for low-power and high-speed application
Reverse-order source/drain formation with double offset spacer (RODOS) for low-power and high-speed application
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Reverse-order source/drain formation with double offset spacer (RODOS) for low-power and high-speed application

WOO YOUNG CHOI ; CHOI, Byung-Yong ; WOO, Dong-Soo ; JONG DUK LEE ; PARK, Byung-Gook

IEEE transactions on nanotechnology, 2003-12, Vol.2 (4), p.210-216 [Periódico revisado por pares]

New York, NY: IEEE

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