Result Number | Material Type | Add to My Shelf Action | Record Details and Options |
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1 |
Material Type: Artigo
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VLSI module placement based on rectangle-packing by the sequence-pairMurata, H. ; Fujiyoshi, K. ; Nakatake, S. ; Kajitani, Y.IEEE transactions on computer-aided design of integrated circuits and systems, 1996-12, Vol.15 (12), p.1518-1524 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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2 |
Material Type: Artigo
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A precorrected-FFT method for electrostatic analysis of complicated 3-D structuresPhillips, J.R. ; White, J.K.IEEE transactions on computer-aided design of integrated circuits and systems, 1997-10, Vol.16 (10), p.1059-1072 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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3 |
Material Type: Artigo
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Efficient linear circuit analysis by Pade approximation via the Lanczos processFeldmann, P. ; Freund, R.W.IEEE transactions on computer-aided design of integrated circuits and systems, 1995-05, Vol.14 (5), p.639-649 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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4 |
Material Type: Artigo
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An analytical delay model for RLC interconnectsKahng, A.B. ; Muddu, S.IEEE transactions on computer-aided design of integrated circuits and systems, 1997-12, Vol.16 (12), p.1507-1514 [Periódico revisado por pares]IEEETexto completo disponível |
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5 |
Material Type: Artigo
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SIMON-A simulator for single-electron tunnel devices and circuitsWasshuber, C. ; Kosina, H. ; Selberherr, S.IEEE transactions on computer-aided design of integrated circuits and systems, 1997-09, Vol.16 (9), p.937-944 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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6 |
Material Type: Artigo
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Synthesis of high-performance analog circuits in ASTRX/OBLXOchotta, E.S. ; Rutenbar, R.A. ; Carley, L.R.IEEE transactions on computer-aided design of integrated circuits and systems, 1996-03, Vol.15 (3), p.273-294 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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7 |
Material Type: Artigo
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New spectral methods for ratio cut partitioning and clusteringHagen, L. ; Kahng, A.B.IEEE transactions on computer-aided design of integrated circuits and systems, 1992-09, Vol.11 (9), p.1074-1085 [Periódico revisado por pares]NEW YORK: IEEETexto completo disponível |
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8 |
Material Type: Artigo
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Crosstalk reduction for VLSIVittal, A. ; Marek-Sadowska, M.IEEE transactions on computer-aided design of integrated circuits and systems, 1997-03, Vol.16 (3), p.290-298 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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9 |
Material Type: Artigo
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Symbolic model checking for sequential circuit verificationBurch, J.R. ; Clarke, E.M. ; Long, D.E. ; McMillan, K.L. ; Dill, D.L.IEEE transactions on computer-aided design of integrated circuits and systems, 1994-04, Vol.13 (4), p.401-424 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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10 |
Material Type: Artigo
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FlowMap: an optimal technology mapping algorithm for delay optimization in lookup-table based FPGA designsCong, J. ; Yuzheng DingIEEE transactions on computer-aided design of integrated circuits and systems, 1994-01, Vol.13 (1), p.1-12 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |