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A System Architecture for Mobility as a Service in Autonomous Transportation Systems
A System Architecture for Mobility as a Service in Autonomous Transportation Systems
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A System Architecture for Mobility as a Service in Autonomous Transportation Systems

JIAN, Weitao ; CAI, Ming ; HUANG, Wei ; LI, Shichang

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2023, pp.2023EAP1027 [Periódico revisado por pares]

The Institute of Electronics, Information and Communication Engineers

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A System Architecture for Mobility as a Service in Autonomous Transportation Systems
A System Architecture for Mobility as a Service in Autonomous Transportation Systems
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A System Architecture for Mobility as a Service in Autonomous Transportation Systems

JIAN, Weitao ; CAI, Ming ; HUANG, Wei ; LI, Shichang

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2023/12/01, Vol.E106.A(12), pp.1555-1568 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

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3
A Reconfigurable 74-140 Mbps LDPC Decoding System for CCSDS Standard
A Reconfigurable 74-140 Mbps LDPC Decoding System for CCSDS Standard
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A Reconfigurable 74-140 Mbps LDPC Decoding System for CCSDS Standard

CHEN, Yun ; WANG, Jimin ; LI, Shixian ; XIE, Jinfou ; ZHANG, Qichen ; PARHI, Keshab K. ; ZENG, Xiaoyang

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2021, pp.2020KEP0006 [Periódico revisado por pares]

The Institute of Electronics, Information and Communication Engineers

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4
Prime-Factor GFFT Architecture for Fast Frequency Domain Decoding of Cyclic Codes
Prime-Factor GFFT Architecture for Fast Frequency Domain Decoding of Cyclic Codes
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Prime-Factor GFFT Architecture for Fast Frequency Domain Decoding of Cyclic Codes

CHANG, Yanyan ; ZHANG, Wei ; WANG, Hao ; SHI, Lina ; LIU, Yanyan

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2024/01/01, Vol.E107.A(1), pp.174-177 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

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5
An eFPGA Generation Suite with Customizable Architecture and IDE
An eFPGA Generation Suite with Customizable Architecture and IDE
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An eFPGA Generation Suite with Customizable Architecture and IDE

KUGA, Morihiro ; ZHAO, Qian ; NAKAZATO, Yuya ; AMAGASAKI, Motoki ; IIDA, Masahiro

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2023/03/01, Vol.E106.A(3), pp.560-574 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

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6
Vehicle Re-Identification Based on Quadratic Split Architecture and Auxiliary Information Embedding
Vehicle Re-Identification Based on Quadratic Split Architecture and Auxiliary Information Embedding
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Vehicle Re-Identification Based on Quadratic Split Architecture and Auxiliary Information Embedding

LU, Tongwei ; ZHANG, Hao ; MIN, Feng ; JIA, Shihai

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2022/12/01, Vol.E105.A(12), pp.1621-1625 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

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7
An eFPGA Generation Suite with Customizable Architecture and IDE
An eFPGA Generation Suite with Customizable Architecture and IDE
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An eFPGA Generation Suite with Customizable Architecture and IDE

KUGA, Morihiro ; ZHAO, Qian ; NAKAZATO, Yuya ; AMAGASAKI, Motoki ; IIDA, Masahiro

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2022, pp.2022VLP0008 [Periódico revisado por pares]

The Institute of Electronics, Information and Communication Engineers

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8
Vehicle Re-identification Based on Quadratic Split Architecture and Auxiliary Information Embedding
Vehicle Re-identification Based on Quadratic Split Architecture and Auxiliary Information Embedding
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Vehicle Re-identification Based on Quadratic Split Architecture and Auxiliary Information Embedding

LU, Tongwei ; ZHANG, Hao ; MIN, Feng ; JIA, Shihai

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2022, pp.2022EAL2008 [Periódico revisado por pares]

The Institute of Electronics, Information and Communication Engineers

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9
High Performance Application Specific Stream Architecture for Hardware Acceleration of HOG-SVM on FPGA
High Performance Application Specific Stream Architecture for Hardware Acceleration of HOG-SVM on FPGA
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High Performance Application Specific Stream Architecture for Hardware Acceleration of HOG-SVM on FPGA

RANAWAKA, Piyumal ; EKPANYAPONG, Mongkol ; TAVARES, Adriano ; DAILEY, Mathew ; ATHIKULWONGSE, Krit ; SILVA, Vitor

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2019/12/01, Vol.E102.A(12), pp.1792-1803 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

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10
Simultaneous Scheduling and Core-Type Optimization for Moldable Fork-Join Tasks on Heterogeneous Multicores
Simultaneous Scheduling and Core-Type Optimization for Moldable Fork-Join Tasks on Heterogeneous Multicores
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Simultaneous Scheduling and Core-Type Optimization for Moldable Fork-Join Tasks on Heterogeneous Multicores

NISHIKAWA, Hiroki ; SHIMADA, Kana ; TANIGUCHI, Ittetsu ; TOMIYAMA, Hiroyuki

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2022/03/01, Vol.E105.A(3), pp.540-548 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

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