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1
Low-clock-speed time-interleaved architecture for a polar delta–sigma modulator transmitter
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Low-clock-speed time-interleaved architecture for a polar delta–sigma modulator transmitter

Nasser Erfani Majd ; Rezvan Fani

ETRI journal, 2023-02, Vol.45 (1), p.150-162 [Peer Reviewed Journal]

한국전자통신연구원

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2
Fully parallel low-density parity-check code-based polar decoder architecture for 5G wireless communications
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Fully parallel low-density parity-check code-based polar decoder architecture for 5G wireless communications

Dinesh Kumar Devadoss ; Shantha Selvakumari Ramapackiam

ETRI journal, 2024, Vol.46 (3), p.485-500 [Peer Reviewed Journal]

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3
Multimodal audiovisual speech recognition architecture using a three-feature multi-fusion method for noise-robust systems
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Multimodal audiovisual speech recognition architecture using a three-feature multi-fusion method for noise-robust systems

Sanghun Jeon ; Jieun Lee ; Dohyeon Yeo ; Yong-Ju Lee ; SeungJun Kim

ETRI journal, 2024, Vol.46 (1), p.22-34 [Peer Reviewed Journal]

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4
Conservative Approximation - Based Full-Search Block Matching Algorithm Architecture for QCIF Digital Video Employing Systolic Array Architecture
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Conservative Approximation - Based Full-Search Block Matching Algorithm Architecture for QCIF Digital Video Employing Systolic Array Architecture

Ganapathi, Hegde ; Amritha, Krishna R.S ; Pukhraj, Vaya

ETRI journal, 2015-08, Vol.37 (4), p.772-779 [Peer Reviewed Journal]

한국전자통신연구원

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5
A multilayered Pauli tracking architecture for lattice surgery-based logical qubits
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A multilayered Pauli tracking architecture for lattice surgery-based logical qubits

Jin-Ho On ; Chei-Yol Kim ; Soo-Cheol Oh ; Sang-Min Lee ; Gyu-Il Cha

ETRI journal, 2023-06, Vol.45 (3), p.1-17 [Peer Reviewed Journal]

ETRI

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6
A multilayered Pauli tracking architecture for lattice surgery-based logical qubits
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A multilayered Pauli tracking architecture for lattice surgery-based logical qubits

Jin-Ho, On ; Chei-Yol Kim ; Soo-Cheol Oh ; Sang-Min Lee ; Gyu-Il Cha

ETRI journal, 2023, Vol.45 (3), p.462-478 [Peer Reviewed Journal]

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7
Distributed memory access architecture and control for fully disaggregated datacenter network
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Distributed memory access architecture and control for fully disaggregated datacenter network

Kyeong-Eun Han ; Ji Wook Youn ; Jongtae Song ; Dae-Ub Kim ; Joon Ki Lee

ETRI journal, 2022-12, Vol.44 (6), p.1020-1033 [Peer Reviewed Journal]

한국전자통신연구원

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8
IoT data analytics architecture for smart healthcare using RFID and WSN
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IoT data analytics architecture for smart healthcare using RFID and WSN

Nur Banu O&#287 ; ur ; Mohammed Al-Hubaishi ; Celal &#199 ; eken

ETRI journal, 2022-02, Vol.44 (1), p.135-146 [Peer Reviewed Journal]

한국전자통신연구원

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9
Low-power heterogeneous uncore architecture for future 3D chip-multiprocessors
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Low-power heterogeneous uncore architecture for future 3D chip-multiprocessors

Dorostkar, Aniseh ; Asad, Arghavan ; Fathy, Mahmood ; Jahed-Motlagh, Mohammad Reza ; Mohammadi, Farah

ETRI journal, 2018-12, Vol.40 (6), p.759-773 [Peer Reviewed Journal]

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10
Highly Power-Efficient Rack-Level DC Power Architecture Combined with Node-Level DC UPS
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Highly Power-Efficient Rack-Level DC Power Architecture Combined with Node-Level DC UPS

Kwon, Won Ok ; Seo, Hae Moon ; Choi, Pyung

ETRI journal, 2011-08, Vol.33 (4), p.648-651 [Peer Reviewed Journal]

한국전자통신연구원

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