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Approach for integrated modular avionics reconfiguration modelling and reliability analysis based on AADL
Approach for integrated modular avionics reconfiguration modelling and reliability analysis based on AADL
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Approach for integrated modular avionics reconfiguration modelling and reliability analysis based on AADL

Zhang, Quan ; Wang, Shihai ; Liu, Bin

IET software, 2016-02, Vol.10 (1), p.18-25 [Periódico revisado por pares]

The Institution of Engineering and Technology

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2
Accelerating Deep Neural Networks implementation: A survey
Accelerating Deep Neural Networks implementation: A survey
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Accelerating Deep Neural Networks implementation: A survey

Dhouibi, Meriam ; Ben Salem, Ahmed Karim ; Saidi, Afef ; Ben Saoud, Slim

IET computers & digital techniques, 2021-03, Vol.15 (2), p.79-96 [Periódico revisado por pares]

Hindawi-IET

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3
High-performance elliptic curve cryptography processor over NIST prime fields
High-performance elliptic curve cryptography processor over NIST prime fields
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High-performance elliptic curve cryptography processor over NIST prime fields

Hossain, Md Selim ; Kong, Yinan ; Saeedi, Ehsan ; Vayalil, Niras C

IET computers & digital techniques, 2017-01, Vol.11 (1), p.33-42 [Periódico revisado por pares]

The Institution of Engineering and Technology

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4
HGR-Net: a fusion network for hand gesture segmentation and recognition
HGR-Net: a fusion network for hand gesture segmentation and recognition
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HGR-Net: a fusion network for hand gesture segmentation and recognition

Dadashzadeh, Amirhossein ; Targhi, Alireza Tavakoli ; Tahmasbi, Maryam ; Mirmehdi, Majid

IET computer vision, 2019-12, Vol.13 (8), p.700-707 [Periódico revisado por pares]

The Institution of Engineering and Technology

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5
A universal method for designing low-power carbon nanotube FET-based multiple-valued logic circuits
A universal method for designing low-power carbon nanotube FET-based multiple-valued logic circuits
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A universal method for designing low-power carbon nanotube FET-based multiple-valued logic circuits

Moaiyeri, Mohammad Hossein ; Mirzaee, Reza Faghih ; Doostaregan, Akbar ; Navi, Keivan ; Hashemipour, Omid

IET computers & digital techniques, 2013-07, Vol.7 (4), p.167-181 [Periódico revisado por pares]

Stevenage: The Institution of Engineering and Technology

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6
Multi-stream 3D CNN structure for human action recognition trained by limited data
Multi-stream 3D CNN structure for human action recognition trained by limited data
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Multi-stream 3D CNN structure for human action recognition trained by limited data

Chenarlogh, Vahid Ashkani ; Razzazi, Farbod

IET computer vision, 2019-04, Vol.13 (3), p.338-344 [Periódico revisado por pares]

The Institution of Engineering and Technology

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7
Ten years of hardware Trojans: a survey from the attacker's perspective
Ten years of hardware Trojans: a survey from the attacker's perspective
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Ten years of hardware Trojans: a survey from the attacker's perspective

Xue, Mingfu ; Gu, Chongyan ; Liu, Weiqiang ; Yu, Shichao ; O'Neill, Máire

IET computers & digital techniques, 2020-11, Vol.14 (6), p.231-246 [Periódico revisado por pares]

The Institution of Engineering and Technology

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8
Verification of serialising instructions for security against transient execution attacks
Verification of serialising instructions for security against transient execution attacks
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Verification of serialising instructions for security against transient execution attacks

Ponugoti, Kushal K. ; Srinivasan, Sudarshan K. ; Mathure, Nimish

IET computers & digital techniques, 2023-07, Vol.17 (3-4), p.127-140 [Periódico revisado por pares]

Hindawi-IET

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9
FPGA‐based implementation of floating point processing element for the design of efficient FIR filters
FPGA‐based implementation of floating point processing element for the design of efficient FIR filters
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FPGA‐based implementation of floating point processing element for the design of efficient FIR filters

John, Tintu Mary ; Chacko, Shanty

IET computers & digital techniques, 2021-07, Vol.15 (4), p.296-301 [Periódico revisado por pares]

Hindawi-IET

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10
Automatic diagnosis of single fault in interconnect testing of SRAM‐based FPGA
Automatic diagnosis of single fault in interconnect testing of SRAM‐based FPGA
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Automatic diagnosis of single fault in interconnect testing of SRAM‐based FPGA

Nirmalraj, T. ; Radhakrishnan, S. ; Pandiyan, S.K.

IET computers & digital techniques, 2021-09, Vol.15 (5), p.362-371 [Periódico revisado por pares]

Hindawi-IET

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