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An Efficient Application Mapping Approach for the Co-Optimization of Reliability, Energy, and Performance in Reconfigurable NoC Architectures
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An Efficient Application Mapping Approach for the Co-Optimization of Reliability, Energy, and Performance in Reconfigurable NoC Architectures

Wu, Chen ; Deng, Chenchen ; Liu, Leibo ; Han, Jie ; Chen, Jiqiang ; Yin, Shouyi ; Wei, Shaojun

IEEE transactions on computer-aided design of integrated circuits and systems, 2015-08, Vol.34 (8), p.1264-1277 [Periódico revisado por pares]

New York: IEEE

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2
Majority-Inverter Graph: A New Paradigm for Logic Optimization
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Majority-Inverter Graph: A New Paradigm for Logic Optimization

Amaru, Luca ; Gaillardon, Pierre-Emmanuel ; De Micheli, Giovanni

IEEE transactions on computer-aided design of integrated circuits and systems, 2016-05, Vol.35 (5), p.806-819 [Periódico revisado por pares]

New York: IEEE

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3
OMNI: A Framework for Integrating Hardware and Software Optimizations for Sparse CNNs
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OMNI: A Framework for Integrating Hardware and Software Optimizations for Sparse CNNs

Liang, Yun ; Lu, Liqiang ; Xie, Jiaming

IEEE transactions on computer-aided design of integrated circuits and systems, 2021-08, Vol.40 (8), p.1648-1661 [Periódico revisado por pares]

New York: IEEE

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4
FCNNLib: A Flexible Convolution Algorithm Library for Deep Learning on FPGAs
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FCNNLib: A Flexible Convolution Algorithm Library for Deep Learning on FPGAs

Liang, Yun ; Xiao, Qingcheng ; Lu, Liqiang ; Xie, Jiaming

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-08, Vol.41 (8), p.2546-2559 [Periódico revisado por pares]

New York: IEEE

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5
Efficient Formal Verification of Galois-Field Arithmetic Circuits Using ZDD Representation of Boolean Polynomials
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Efficient Formal Verification of Galois-Field Arithmetic Circuits Using ZDD Representation of Boolean Polynomials

Ito, Akira ; Ueno, Rei ; Homma, Naofumi

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-03, Vol.41 (3), p.794-798 [Periódico revisado por pares]

New York: IEEE

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