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Neural Architecture Search Survey: A Hardware Perspective
Neural Architecture Search Survey: A Hardware Perspective
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Neural Architecture Search Survey: A Hardware Perspective

Chitty-Venkata, Krishna Teja ; Somani, Arun K.

ACM computing surveys, 2022-11, Vol.55 (4), p.1-36, Article 78 [Periódico revisado por pares]

New York, NY: ACM

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FPGA-Based High-Throughput CNN Hardware Accelerator With High Computing Resource Utilization Ratio
FPGA-Based High-Throughput CNN Hardware Accelerator With High Computing Resource Utilization Ratio
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FPGA-Based High-Throughput CNN Hardware Accelerator With High Computing Resource Utilization Ratio

Huang, Wenjin ; Wu, Huangtao ; Chen, Qingkun ; Luo, Conghui ; Zeng, Shihao ; Li, Tianrui ; Huang, Yihua

IEEE transaction on neural networks and learning systems, 2022-08, Vol.33 (8), p.4069-4083

United States: IEEE

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3
An Efficient and Scalable Semiconductor Architecture for Parallel Automata Processing
An Efficient and Scalable Semiconductor Architecture for Parallel Automata Processing
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An Efficient and Scalable Semiconductor Architecture for Parallel Automata Processing

Dlugosch, Paul ; Brown, Dave ; Glendenning, Paul ; Leventhal, Michael ; Noyes, Harold

IEEE transactions on parallel and distributed systems, 2014-12, Vol.25 (12), p.3088-3098 [Periódico revisado por pares]

New York: IEEE

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4
A Survey of System Architectures and Techniques for FPGA Virtualization
A Survey of System Architectures and Techniques for FPGA Virtualization
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A Survey of System Architectures and Techniques for FPGA Virtualization

Quraishi, Masudul Hassan ; Tavakoli, Erfan Bank ; Ren, Fengbo

IEEE transactions on parallel and distributed systems, 2021-09, Vol.32 (9), p.2216-2230 [Periódico revisado por pares]

IEEE

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5
Encoding, Model, and Architecture: Systematic Optimization for Spiking Neural Network in FPGAs
Encoding, Model, and Architecture: Systematic Optimization for Spiking Neural Network in FPGAs
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Encoding, Model, and Architecture: Systematic Optimization for Spiking Neural Network in FPGAs

Fang, Haowen ; Mei, Zaidao ; Shrestha, Amar ; Zhao, Ziyi ; Li, Yilan ; Qiu, Qinru

2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 2020, p.1-9

Association on Computer Machinery

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6
A Configurable Hardware Architecture for Runtime Application of Network Calculus
A Configurable Hardware Architecture for Runtime Application of Network Calculus
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A Configurable Hardware Architecture for Runtime Application of Network Calculus

Hu, Xiao ; Lu, Zhonghai

International journal of parallel programming, 2021-10, Vol.49 (5), p.745-760 [Periódico revisado por pares]

New York: Springer US

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7
Embedded Hardware-Efficient Real-Time Classification With Cascade Support Vector Machines
Embedded Hardware-Efficient Real-Time Classification With Cascade Support Vector Machines
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Embedded Hardware-Efficient Real-Time Classification With Cascade Support Vector Machines

Kyrkou, Christos ; Bouganis, Christos-Savvas ; Theocharides, Theocharis ; Polycarpou, Marios M.

IEEE transaction on neural networks and learning systems, 2016-01, Vol.27 (1), p.99-112

United States: IEEE

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8
A cloud-scale acceleration architecture
A cloud-scale acceleration architecture
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A cloud-scale acceleration architecture

Caulfield, Adrian M. ; Chung, Eric S. ; Putnam, Andrew ; Angepat, Hari ; Fowers, Jeremy ; Haselman, Michael ; Heil, Stephen ; Humphrey, Matt ; Kaur, Puneet ; Joo-Young Kim ; Lo, Daniel ; Massengill, Todd ; Ovtcharov, Kalin ; Papamichael, Michael ; Woods, Lisa ; Lanka, Sitaram ; Chiou, Derek ; Burger, Doug

2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2016, p.1-13

IEEE

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9
Neuromemristive Circuits for Edge Computing: A Review
Neuromemristive Circuits for Edge Computing: A Review
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Neuromemristive Circuits for Edge Computing: A Review

Krestinskaya, Olga ; James, Alex Pappachen ; Chua, Leon Ong

IEEE transaction on neural networks and learning systems, 2020-01, Vol.31 (1), p.4-23

United States: IEEE

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10
fpgaConvNet: Mapping Regular and Irregular Convolutional Neural Networks on FPGAs
fpgaConvNet: Mapping Regular and Irregular Convolutional Neural Networks on FPGAs
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fpgaConvNet: Mapping Regular and Irregular Convolutional Neural Networks on FPGAs

Venieris, Stylianos I. ; Bouganis, Christos-Savvas

IEEE transaction on neural networks and learning systems, 2019-02, Vol.30 (2), p.326-342

United States: IEEE

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