Result Number | Material Type | Add to My Shelf Action | Record Details and Options |
---|---|---|---|
11 |
Material Type: Artigo
|
![]() |
Computing in Memory With Spin-Transfer Torque Magnetic RAMJain, Shubham ; Ranjan, Ashish ; Roy, Kaushik ; Raghunathan, AnandIEEE transactions on very large scale integration (VLSI) systems, 2018-03, Vol.26 (3), p.470-483 [Periódico revisado por pares]IEEETexto completo disponível |
12 |
Material Type: Artigo
|
![]() |
Memristor MOS Content Addressable Memory (MCAM): Hybrid Architecture for Future High Performance Search EnginesEshraghian, Kamran ; Kyoung-Rok Cho ; Kavehei, Omid ; Soon-Ku Kang ; Abbott, Derek ; Sung-Mo Steve KangIEEE transactions on very large scale integration (VLSI) systems, 2011-08, Vol.19 (8), p.1407-1417 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
13 |
Material Type: Artigo
|
![]() |
Compute-in-Memory Technologies and Architectures for Deep Learning WorkloadsAli, Mustafa ; Roy, Sourjya ; Saxena, Utkarsh ; Sharma, Tanvi ; Raghunathan, Anand ; Roy, KaushikIEEE transactions on very large scale integration (VLSI) systems, 2022-11, Vol.30 (11), p.1-16 [Periódico revisado por pares]New York: IEEETexto completo disponível |
14 |
Material Type: Artigo
|
![]() |
DURE: An Energy- and Resource-Efficient TCAM Architecture for FPGAs With Dynamic UpdatesUllah, Inayat ; Ullah, Zahid ; Afzaal, Umar ; Lee, Jeong-AIEEE transactions on very large scale integration (VLSI) systems, 2019-06, Vol.27 (6), p.1298-1307 [Periódico revisado por pares]New York: IEEETexto completo disponível |
15 |
Material Type: Artigo
|
![]() |
High Restore Yield NVSRAM Structures With Dual Complementary RRAM Devices for High-Speed ApplicationsLin, Zhiting ; Chen, Min ; Sun, Peng ; Wu, Xiulong ; Zhao, Qiang ; Lu, Wenjuan ; Peng, ChunyuIEEE transactions on very large scale integration (VLSI) systems, 2023-04, Vol.31 (4), p.522-531 [Periódico revisado por pares]New York: IEEETexto completo disponível |
16 |
Material Type: Artigo
|
![]() |
PXNOR-BNN: In/With Spin-Orbit Torque MRAM Preset-XNOR Operation-Based Binary Neural NetworksChang, Liang ; Ma, Xin ; Wang, Zhaohao ; Zhang, Youguang ; Xie, Yuan ; Zhao, WeishengIEEE transactions on very large scale integration (VLSI) systems, 2019-11, Vol.27 (11), p.2668-2679 [Periódico revisado por pares]New York: IEEETexto completo disponível |
17 |
Material Type: Artigo
|
![]() |
A 2-D Calibration Scheme for Resistive Nonvolatile MemoriesLee, Albert ; Jagannathan, Raahul ; Wu, Di ; Wang, Kang L.IEEE transactions on very large scale integration (VLSI) systems, 2020-06, Vol.28 (6), p.1371-1377 [Periódico revisado por pares]New York: IEEETexto completo disponível |
18 |
Material Type: Artigo
|
![]() |
Reuse-Distance-Aware Write-Intensity Prediction of Dataless Entries for Energy-Efficient Hybrid CachesAgarwal, Sukarn ; Kapoor, Hemangee K.IEEE transactions on very large scale integration (VLSI) systems, 2018-10, Vol.26 (10), p.1881-1894 [Periódico revisado por pares]New York: IEEETexto completo disponível |
19 |
Material Type: Artigo
|
![]() |
PFHA: A Novel Page Migration Algorithm for Hybrid Memory Embedded SystemsNiu, Na ; Fu, Fangfa ; Yang, Bing ; Wang, Qiang ; Li, Xinpeng ; Lai, Fengchang ; Wang, JinxiangIEEE transactions on very large scale integration (VLSI) systems, 2021-10, Vol.29 (10), p.1685-1692 [Periódico revisado por pares]New York: IEEETexto completo disponível |
20 |
Material Type: Artigo
|
![]() |
Design of Spin-Torque Transfer Magnetoresistive RAM and CAM/TCAM with High Sensing and Search SpeedXu, Wei ; Zhang, Tong ; Chen, YiranIEEE transactions on very large scale integration (VLSI) systems, 2010-01, Vol.18 (1), p.66-74 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |