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Comprehensive Power Gain Assessment of GaN-SOI-FinFET for Improved RF/Wireless Performance Using TCAD
Comprehensive Power Gain Assessment of GaN-SOI-FinFET for Improved RF/Wireless Performance Using TCAD
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Comprehensive Power Gain Assessment of GaN-SOI-FinFET for Improved RF/Wireless Performance Using TCAD

Kumar, Ajay ; Gupta, Neha ; Goyal, Amit Kumar ; Massoud, Yehia

Micromachines (Basel), 2022-08, Vol.13 (9), p.1418 [Periódico revisado por pares]

Basel: MDPI AG

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2
High-Drain Field Impacting Channel-Length Modulation Effect for Nano-Node N-Channel FinFETs
High-Drain Field Impacting Channel-Length Modulation Effect for Nano-Node N-Channel FinFETs
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High-Drain Field Impacting Channel-Length Modulation Effect for Nano-Node N-Channel FinFETs

Wang, Mu-Chun ; Hsieh, Wen-Ching ; Lin, Chii-Ruey ; Chu, Wei-Lun ; Liao, Wen-Shiang ; Lan, Wen-How

Crystals (Basel), 2021-03, Vol.11 (3), p.262 [Periódico revisado por pares]

Basel: MDPI AG

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3
Silicon Nanowire Parameter Extraction Using DFT and Comparative Performance Analysis of SiNWFET and CNTFET Devices
Silicon Nanowire Parameter Extraction Using DFT and Comparative Performance Analysis of SiNWFET and CNTFET Devices
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Silicon Nanowire Parameter Extraction Using DFT and Comparative Performance Analysis of SiNWFET and CNTFET Devices

Singh, B. ; Prasad, B. ; Kumar, D.

Semiconductors (Woodbury, N.Y.), 2021-01, Vol.55 (1), p.100-107 [Periódico revisado por pares]

Moscow: Pleiades Publishing

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4
Hybrid Silicon Substrate FinFET-Metal Insulator Metal (MIM) Memristor Based Sense Amplifier Design for the Non-Volatile SRAM Cell
Hybrid Silicon Substrate FinFET-Metal Insulator Metal (MIM) Memristor Based Sense Amplifier Design for the Non-Volatile SRAM Cell
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Hybrid Silicon Substrate FinFET-Metal Insulator Metal (MIM) Memristor Based Sense Amplifier Design for the Non-Volatile SRAM Cell

Priya, G Lakshmi ; Rawat, Namita ; Sanagavarapu, Abhishek ; Venkatesh, M ; Andrew Roobert, A

Micromachines (Basel), 2023-01, Vol.14 (2), p.232 [Periódico revisado por pares]

Switzerland: MDPI AG

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5
Modeling of Gate Stack Patterning for Advanced Technology Nodes: A Review
Modeling of Gate Stack Patterning for Advanced Technology Nodes: A Review
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Modeling of Gate Stack Patterning for Advanced Technology Nodes: A Review

Klemenschits, Xaver ; Selberherr, Siegfried ; Filipovic, Lado

Micromachines (Basel), 2018-11, Vol.9 (12), p.631 [Periódico revisado por pares]

Switzerland: MDPI AG

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6
The Optimization and Analysis of a Triple-Fin Heterostructure-on-Insulator Fin Field-Effect Transistor with a Stacked High-k Configuration and 10 nm Channel Length
The Optimization and Analysis of a Triple-Fin Heterostructure-on-Insulator Fin Field-Effect Transistor with a Stacked High-k Configuration and 10 nm Channel Length
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The Optimization and Analysis of a Triple-Fin Heterostructure-on-Insulator Fin Field-Effect Transistor with a Stacked High-k Configuration and 10 nm Channel Length

Saha, Priyanka ; Sankar Dhar, Rudra ; Nanda, Swagat ; Kumar, Kuleen ; Alathbah, Moath

Nanomaterials (Basel, Switzerland), 2023-11, Vol.13 (23), p.3008 [Periódico revisado por pares]

Switzerland: MDPI AG

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7
Process Corresponding Implications Associated with a Conclusive Model-Fit Current-Voltage Characteristic Curves
Process Corresponding Implications Associated with a Conclusive Model-Fit Current-Voltage Characteristic Curves
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Process Corresponding Implications Associated with a Conclusive Model-Fit Current-Voltage Characteristic Curves

Yang, Hsin-Chia ; Chi, Sung-Ching

Applied sciences, 2022-01, Vol.12 (1), p.462 [Periódico revisado por pares]

Basel: MDPI AG

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8
Development and Analysis of a Three-Fin Trigate Q-FinFET for a 3 nm Technology Node with a Strained-Silicon Channel System
Development and Analysis of a Three-Fin Trigate Q-FinFET for a 3 nm Technology Node with a Strained-Silicon Channel System
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Development and Analysis of a Three-Fin Trigate Q-FinFET for a 3 nm Technology Node with a Strained-Silicon Channel System

Nanda, Swagat ; Dhar, Rudra Sankar ; Awwad, Falah ; Hussein, Mousa I

Nanomaterials (Basel, Switzerland), 2023-05, Vol.13 (10), p.1662 [Periódico revisado por pares]

Switzerland: MDPI AG

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9
Study of a hysteresis window of FinFET and fully-depleted silicon-on-insulator (FDSOI) MOSFET with ferroelectric capacitor
Study of a hysteresis window of FinFET and fully-depleted silicon-on-insulator (FDSOI) MOSFET with ferroelectric capacitor
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Study of a hysteresis window of FinFET and fully-depleted silicon-on-insulator (FDSOI) MOSFET with ferroelectric capacitor

Yoon, Chankeun ; Moon, Seungjun ; Shin, Changhwan

Nano Convergence, 2020, 7(19), , pp.1-7 [Periódico revisado por pares]

Singapore: Springer Singapore

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10
Comparison of Various Factors Affected TID Tolerance in FinFET and Nanowire FET
Comparison of Various Factors Affected TID Tolerance in FinFET and Nanowire FET
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Comparison of Various Factors Affected TID Tolerance in FinFET and Nanowire FET

Won, Hyeonjae ; Ham, Ilsik ; Jeong, Youngseok ; Kang, Myounggon

Applied sciences, 2019-08, Vol.9 (15), p.3163 [Periódico revisado por pares]

Basel: MDPI AG

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