Result Number | Material Type | Add to My Shelf Action | Record Details and Options |
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1 |
Material Type: Artigo
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PRIMA: passive reduced-order interconnect macromodeling algorithmOdabasioglu, A. ; Celik, M. ; Pileggi, L.T.IEEE transactions on computer-aided design of integrated circuits and systems, 1998-08, Vol.17 (8), p.645-654 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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2 |
Material Type: Artigo
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A framework for comparing models of computationLee, E.A. ; Sangiovanni-Vincentelli, A.IEEE transactions on computer-aided design of integrated circuits and systems, 1998-12, Vol.17 (12), p.1217-1229 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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3 |
Material Type: Artigo
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Policy optimization for dynamic power managementBenini, L. ; Bogliolo, A. ; Paleologo, G.A. ; De Micheli, G.IEEE transactions on computer-aided design of integrated circuits and systems, 1999-06, Vol.18 (6), p.813-833 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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4 |
Material Type: Artigo
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VLSI module placement based on rectangle-packing by the sequence-pairMurata, H. ; Fujiyoshi, K. ; Nakatake, S. ; Kajitani, Y.IEEE transactions on computer-aided design of integrated circuits and systems, 1996-12, Vol.15 (12), p.1518-1524 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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5 |
Material Type: Artigo
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A precorrected-FFT method for electrostatic analysis of complicated 3-D structuresPhillips, J.R. ; White, J.K.IEEE transactions on computer-aided design of integrated circuits and systems, 1997-10, Vol.16 (10), p.1059-1072 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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6 |
Material Type: Artigo
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Efficient linear circuit analysis by Pade approximation via the Lanczos processFeldmann, P. ; Freund, R.W.IEEE transactions on computer-aided design of integrated circuits and systems, 1995-05, Vol.14 (5), p.639-649 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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7 |
Material Type: Artigo
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Techniques for minimizing power dissipation in scan and combinational circuits during test applicationDabholkar, V. ; Chakravarty, S. ; Pomeranz, I. ; Reddy, S.IEEE transactions on computer-aided design of integrated circuits and systems, 1998-12, Vol.17 (12), p.1325-1333 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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8 |
Material Type: Artigo
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Local memory exploration and optimization in embedded systemsPanda, P.R. ; Dutt, N.D. ; Nicolau, A.IEEE transactions on computer-aided design of integrated circuits and systems, 1999-01, Vol.18 (1), p.3-13 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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9 |
Material Type: Artigo
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SIMON-A simulator for single-electron tunnel devices and circuitsWasshuber, C. ; Kosina, H. ; Selberherr, S.IEEE transactions on computer-aided design of integrated circuits and systems, 1997-09, Vol.16 (9), p.937-944 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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10 |
Material Type: Artigo
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A new algorithm for elimination of common subexpressionsPasko, R. ; Schaumont, P. ; Derudder, V. ; Vernalde, S. ; Durackova, D.IEEE transactions on computer-aided design of integrated circuits and systems, 1999-01, Vol.18 (1), p.58-68 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |