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Stream-dataflow acceleration
Stream-dataflow acceleration
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Ata de Congresso 		Adicionar ao Meu Espaço

Stream-dataflow acceleration

Nowatzki, Tony ; Gangadhar, Vinay ; Ardalani, Newsha ; Sankaralingam, Karthikeyan

2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA), 2017, p.416-429

ACM

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2
DaDianNao: A Machine-Learning Supercomputer
DaDianNao: A Machine-Learning Supercomputer
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Ata de Congresso 		Adicionar ao Meu Espaço

DaDianNao: A Machine-Learning Supercomputer

Chen, Yunji ; Luo, Tao ; Liu, Shaoli ; Zhang, Shijin ; He, Liqiang ; Wang, Jia ; Li, Ling ; Chen, Tianshi ; Xu, Zhiwei ; Sun, Ninghui ; Temam, Olivier

2014 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014, p.609-622

IEEE Computer Society

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3
Optimizing the Convolution Operation to Accelerate Deep Neural Networks on FPGA
Optimizing the Convolution Operation to Accelerate Deep Neural Networks on FPGA
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Artigo 		Adicionar ao Meu Espaço

Optimizing the Convolution Operation to Accelerate Deep Neural Networks on FPGA

Ma, Yufei ; Cao, Yu ; Vrudhula, Sarma ; Seo, Jae-sun

IEEE transactions on very large scale integration (VLSI) systems, 2018-07, Vol.26 (7), p.1354-1367 [Periódico revisado por pares]

New York: IEEE

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4
High Throughput/Gate AES Hardware Architectures Based on Datapath Compression
High Throughput/Gate AES Hardware Architectures Based on Datapath Compression
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High Throughput/Gate AES Hardware Architectures Based on Datapath Compression

Ueno, Rei ; Homma, Naofumi ; Morioka, Sumio ; Miura, Noriyuki ; Matsuda, Kohei ; Nagata, Makoto ; Bhasin, Shivam ; Mathieu, Yves ; Graba, Tarik ; Danger, Jean-Luc

IEEE transactions on computers, 2020-04, Vol.69 (4), p.534-548 [Periódico revisado por pares]

IEEE

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5
An architecture interface and offload model for low-overhead, near-data, distributed accelerators
An architecture interface and offload model for low-overhead, near-data, distributed accelerators
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Ata de Congresso 		Adicionar ao Meu Espaço

An architecture interface and offload model for low-overhead, near-data, distributed accelerators

Baskaran, Saambhavi ; Kandemir, Mahmut Taylan ; Sampson, Jack

2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), 2022, p.1160-1177

IEEE

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6
On-Chip Interconnection Architecture of the Tile Processor
On-Chip Interconnection Architecture of the Tile Processor
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On-Chip Interconnection Architecture of the Tile Processor

Wentzlaff, D. ; Griffin, P. ; Hoffmann, H. ; Liewei Bao ; Edwards, B. ; Ramey, C. ; Mattina, M. ; Chyi-Chang Miao ; Brown, J.F. ; Agarwal, A.

IEEE MICRO, 2007-09, Vol.27 (5), p.15-31 [Periódico revisado por pares]

Los Alamitos: IEEE

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7
SCALEDEEP: A scalable compute architecture for learning and evaluating deep networks
SCALEDEEP: A scalable compute architecture for learning and evaluating deep networks
Material Type:
Ata de Congresso 		Adicionar ao Meu Espaço

SCALEDEEP: A scalable compute architecture for learning and evaluating deep networks

Venkataramani, Swagath ; Ranjan, Ashish ; Banerjee, Subarno ; Das, Dipankar ; Avancha, Sasikanth ; Jagannathan, Ashok ; Durg, Ajaya ; Nagaraj, Dheemanth ; Kaul, Bharat ; Dubey, Pradeep ; Raghunathan, Anand

2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA), 2017, p.13-26

ACM

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8
In-datacenter performance analysis of a tensor processing unit
In-datacenter performance analysis of a tensor processing unit
Material Type:
Ata de Congresso 		Adicionar ao Meu Espaço

In-datacenter performance analysis of a tensor processing unit

Jouppi, Norman P. ; Borchers, Al ; Boyle, Rick ; Cantin, Pierre-luc ; Chao, Clifford ; Clark, Chris ; Coriell, Jeremy ; Daley, Mike ; Dau, Matt ; Dean, Jeffrey ; Gelb, Ben ; Young, Cliff ; Ghaemmaghami, Tara Vazir ; Gottipati, Rajendra ; Gulland, William ; Hagmann, Robert ; Ho, C. Richard ; Hogberg, Doug ; Hu, John ; Hundt, Robert ; Hurt, Dan ; Ibarz, Julian ; Patil, Nishant ; Jaffey, Aaron ; Jaworski, Alek ; Kaplan, Alexander ; Khaitan, Harshit ; Killebrew, Daniel ; Koch, Andy ; Kumar, Naveen ; Lacy, Steve ; Laudon, James ; Law, James ; Patterson, David ; Le, Diemthu ; Leary, Chris ; Liu, Zhuyuan ; Lucke, Kyle ; Lundin, Alan ; MacKean, Gordon ; Maggiore, Adriana ; Mahony, Maire ; Miller, Kieran ; Nagarajan, Rahul ; Agrawal, Gaurav ; Narayanaswami, Ravi ; Ni, Ray ; Nix, Kathy ; Norrie, Thomas ; Omernick, Mark ; Penukonda, Narayana ; Phelps, Andy ; Ross, Jonathan ; Ross, Matt ; Salek, Amir ; Bajwa, Raminder ; Samadiani, Emad ; Severn, Chris ; Sizikov, Gregory ; Snelham, Matthew ; Souter, Jed ; Steinberg, Dan ; Swing, Andy ; Tan, Mercedes ; Thorson, Gregory ; Tian, Bo ; Bates, Sarah ; Toma, Horia ; Tuttle, Erick ; Vasudevan, Vijay ; Walter, Richard ; Wang, Walter ; Wilcox, Eric ; Yoon, Doe Hyun ; Bhatia, Suresh ; Boden, Nan

2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA), 2017, p.1-12

ACM

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9
An Efficient and Scalable Semiconductor Architecture for Parallel Automata Processing
An Efficient and Scalable Semiconductor Architecture for Parallel Automata Processing
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An Efficient and Scalable Semiconductor Architecture for Parallel Automata Processing

Dlugosch, Paul ; Brown, Dave ; Glendenning, Paul ; Leventhal, Michael ; Noyes, Harold

IEEE transactions on parallel and distributed systems, 2014-12, Vol.25 (12), p.3088-3098 [Periódico revisado por pares]

New York: IEEE

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10
Introduction to the Special Issue on Next-Generation On-Chip and Off-Chip Communication Architectures for Edge, Cloud and HPC
Introduction to the Special Issue on Next-Generation On-Chip and Off-Chip Communication Architectures for Edge, Cloud and HPC
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Introduction to the Special Issue on Next-Generation On-Chip and Off-Chip Communication Architectures for Edge, Cloud and HPC

Kim, John ; Krishna, Tushar

ACM journal on emerging technologies in computing systems, 2023-11, Vol.19 (4), p.1-1, Article 31 [Periódico revisado por pares]

New York, NY: ACM

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