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11
FeCrypto: Instruction Set Architecture for Cryptographic Algorithms Based on FeFET-based In-memory Computing
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FeCrypto: Instruction Set Architecture for Cryptographic Algorithms Based on FeFET-based In-memory Computing

Liu, Rui ; Zhang, Xiaoyu ; Xie, Zhiwen ; Wang, Xinyu ; Li, Zerun ; Chen, Xiaoming ; Han, Yinhe ; Tang, Minghua

IEEE transactions on computer-aided design of integrated circuits and systems, 2023-09, Vol.42 (9), p.1-1 [Periódico revisado por pares]

New York: IEEE

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12
M2NAS: Joint Neural Architecture Optimization System with Network Transmission
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M2NAS: Joint Neural Architecture Optimization System with Network Transmission

Wang, Lanfei ; Xie, Lingxi ; Bi, Kaifeng ; Zhao, Kaili ; Guo, Jun ; Tian, Qi

IEEE transactions on computer-aided design of integrated circuits and systems, 2023-08, Vol.42 (8), p.1-1 [Periódico revisado por pares]

New York: IEEE

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13
SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput
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SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput

Ben-Hur, Rotem ; Ronen, Ronny ; Haj-Ali, Ameer ; Bhattacharjee, Debjyoti ; Eliahu, Adi ; Peled, Natan ; Kvatinsky, Shahar

IEEE transactions on computer-aided design of integrated circuits and systems, 2020-10, Vol.39 (10), p.2434-2447 [Periódico revisado por pares]

New York: IEEE

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14
Blocks: Challenging SIMDs and VLIWs With a Reconfigurable Architecture
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Blocks: Challenging SIMDs and VLIWs With a Reconfigurable Architecture

Wijtvliet, M. ; Kumar, A. ; Corporaal, H.

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-09, Vol.41 (9), p.2915-2928 [Periódico revisado por pares]

IEEE

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15
Improved Mapping of Quantum Circuits to IBM QX Architectures
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Improved Mapping of Quantum Circuits to IBM QX Architectures

Kole, Abhoy ; Hillmich, Stefan ; Datta, Kamalika ; Wille, Robert ; Sengupta, Indranil

IEEE transactions on computer-aided design of integrated circuits and systems, 2020-10, Vol.39 (10), p.2375-2383 [Periódico revisado por pares]

New York: IEEE

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16
Optimized Selection of Reliable and Cost-Effective Safety-Critical System Architectures
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Optimized Selection of Reliable and Cost-Effective Safety-Critical System Architectures

Nuzzo, Pierluigi ; Bajaj, Nikunj ; Masin, Michael ; Kirov, Dmitrii ; Passerone, Roberto ; Sangiovanni-Vincentelli, Alberto L.

IEEE transactions on computer-aided design of integrated circuits and systems, 2020-10, Vol.39 (10), p.2109-2123 [Periódico revisado por pares]

New York: IEEE

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17
Designing Efficient DNNs via Hardware-Aware Neural Architecture Search and Beyond
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Designing Efficient DNNs via Hardware-Aware Neural Architecture Search and Beyond

Luo, Xiangzhong ; Liu, Di ; Huai, Shuo ; Kong, Hao ; Chen, Hui ; Liu, Weichen

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-06, Vol.41 (6), p.1799-1812 [Periódico revisado por pares]

New York: IEEE

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18
On Transferring Application Mapping Knowledge Between Differing MPSoC Architectures
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On Transferring Application Mapping Knowledge Between Differing MPSoC Architectures

Spieck, Jan ; Wildermann, Stefan ; Teich, Jurgen

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-11, Vol.41 (11), p.1-1 [Periódico revisado por pares]

New York: IEEE

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19
Exploring the Potential Benefits of Alternative Quantum Computing Architectures
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Exploring the Potential Benefits of Alternative Quantum Computing Architectures

Deb, Arighna ; Dueck, Gerhard W. ; Wille, Robert

IEEE transactions on computer-aided design of integrated circuits and systems, 2021-09, Vol.40 (9), p.1825-1835 [Periódico revisado por pares]

New York: IEEE

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20
CURIOUS: Efficient Neural Architecture Search Based on a Performance Predictor and Evolutionary Search
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CURIOUS: Efficient Neural Architecture Search Based on a Performance Predictor and Evolutionary Search

Hassantabar, Shayan ; Dai, Xiaoliang ; Jha, Niraj K.

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-11, Vol.41 (11), p.4975-4990 [Periódico revisado por pares]

New York: IEEE

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