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Processing-In-Memory-Based On-Chip Learning With Spike-Time-Dependent Plasticity in 65-nm CMOS
Processing-In-Memory-Based On-Chip Learning With Spike-Time-Dependent Plasticity in 65-nm CMOS
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Processing-In-Memory-Based On-Chip Learning With Spike-Time-Dependent Plasticity in 65-nm CMOS

Kim, Daehyun ; She, Xueyuan ; Rahman, Nael Mizanur ; Chekuri, Venkata Chaitanya Krishna ; Mukhopadhyay, Saibal

IEEE solid-state circuits letters, 2020, Vol.3, p.278-281 [Periódico revisado por pares]

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A Flexible Precision Multi-Format In-Memory Vector Matrix Multiplication Engine in 65 nm CMOS With RF Machine Learning Support
A Flexible Precision Multi-Format In-Memory Vector Matrix Multiplication Engine in 65 nm CMOS With RF Machine Learning Support
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A Flexible Precision Multi-Format In-Memory Vector Matrix Multiplication Engine in 65 nm CMOS With RF Machine Learning Support

Mukherjee, Mandovi ; Long, Yun ; Woo, Jongseok ; Kim, Daehyun ; Rahman, Nael Mizanur ; Dash, Saurabh ; Mukhopadhyay, Saibal

IEEE solid-state circuits letters, 2020, Vol.3, p.450-453 [Periódico revisado por pares]

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Energy-Efficient In-Memory Binary Neural Network Accelerator Design Based on 8T2C SRAM Cell
Energy-Efficient In-Memory Binary Neural Network Accelerator Design Based on 8T2C SRAM Cell
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Energy-Efficient In-Memory Binary Neural Network Accelerator Design Based on 8T2C SRAM Cell

Oh, Hyunmyung ; Kim, Hyungjun ; Ahn, Daehyun ; Park, Jihoon ; Kim, Yulhwa ; Lee, Inhwan ; Kim, Jae-Joon

IEEE solid-state circuits letters, 2022, Vol.5, p.70-73 [Periódico revisado por pares]

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