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1
Exploring the tradeoffs between programmability and efficiency in data-parallel accelerators
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Exploring the tradeoffs between programmability and efficiency in data-parallel accelerators

Lee, Yunsup ; Avizienis, Rimas ; Bishara, Alex ; Xia, Richard ; Lockhart, Derek ; Batten, Christopher ; Asanović, Krste

2011 38th Annual International Symposium on Computer Architecture (ISCA), 2011, p.129-140

New York, NY, USA: ACM

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Pipelining a triggered processing element
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Pipelining a triggered processing element

Repetti, Thomas J. ; Cerqueira, João P. ; Kim, Martha A. ; Seok, Mingoo

2017 50th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2017, p.96-108

New York, NY, USA: ACM

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3
ATAC: a 1000-core cache-coherent processor with on-chip optical network
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ATAC: a 1000-core cache-coherent processor with on-chip optical network

Kurian, George ; Miller, Jason E. ; Psota, James ; Eastep, Jonathan ; Liu, Jifeng ; Michel, Jurgen ; Kimerling, Lionel C. ; Agarwal, Anant

2010 19th International Conference on Parallel Architectures and Compilation Techniques (PACT), 2010, p.477-488

New York, NY, USA: ACM

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4
Application-aware prioritization mechanisms for on-chip networks
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Application-aware prioritization mechanisms for on-chip networks

Das, Reetuparna ; Mutlu, Onur ; Moscibroda, Thomas ; Das, Chita R.

2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2009, p.280-291

New York, NY, USA: ACM

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5
POSTER: collective dynamic parallelism for directive based GPU programming languages and compilers
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POSTER: collective dynamic parallelism for directive based GPU programming languages and compilers

Ozen, Guray ; Ayguadé Parra, Eduard ; Labarta Mancho, Jesús José

Association for Computing Machinery (ACM) 2016

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6
SCARAB: a single cycle adaptive routing and bufferless network
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SCARAB: a single cycle adaptive routing and bufferless network

Hayenga, Mitchell ; Jerger, Natalie Enright ; Lipasti, Mikko

2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2009, p.244-254

New York, NY, USA: ACM

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7
Outer-loop vectorization: revisited for short SIMD architectures
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Outer-loop vectorization: revisited for short SIMD architectures

Nuzman, Dorit ; Zaks, Ayal

2008 International Conference on Parallel Architectures and Compilation Techniques (PACT), 2008, p.2-11

New York, NY, USA: ACM

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8
An abacus turn model for time/space-efficient reconfigurable routing
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An abacus turn model for time/space-efficient reconfigurable routing

Fu, Binzhang ; Han, Yinhe ; Ma, Jun ; Li, Huawei ; Li, Xiaowei

2011 38th Annual International Symposium on Computer Architecture (ISCA), 2011, p.259-270

New York, NY, USA: ACM

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9
Efficient exception handling support for GPUs
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Efficient exception handling support for GPUs

Tanasic, Ivan ; Gelado, Isaac ; Jorda, Marc ; Ayguade, Eduard ; Navarro, Nacho

2017 50th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2017, p.109-122

New York, NY, USA: ACM

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10
Using intra-core loop-task accelerators to improve the productivity and performance of task-based parallel programs
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Using intra-core loop-task accelerators to improve the productivity and performance of task-based parallel programs

Kim, Ji ; Jiang, Shunning ; Torng, Christopher ; Wang, Moyang ; Srinath, Shreesha ; Ilbeyi, Berkin ; Al-Hawaj, Khalid ; Batten, Christopher

2017 50th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2017, p.759-773

New York, NY, USA: ACM

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