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Refinado por: Base de dados/Biblioteca: Materials Research Database remover assunto: Physical Sciences remover
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1
Two-Dimensional Pattern Formation Using Graphoepitaxy of PS‑b‑PMMA Block Copolymers for Advanced FinFET Device and Circuit Fabrication
Two-Dimensional Pattern Formation Using Graphoepitaxy of PS‑b‑PMMA Block Copolymers for Advanced FinFET Device and Circuit Fabrication
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Two-Dimensional Pattern Formation Using Graphoepitaxy of PS‑b‑PMMA Block Copolymers for Advanced FinFET Device and Circuit Fabrication

Tsai, Hsinyu ; Pitera, Jed W ; Miyazoe, Hiroyuki ; Bangsaruntip, Sarunya ; Engelmann, Sebastian U ; Liu, Chi-Chun ; Cheng, Joy Y ; Bucchignano, James J ; Klaus, David P ; Joseph, Eric A ; Sanders, Daniel P ; Colburn, Matthew E ; Guillorn, Michael A

ACS nano, 2014-05, Vol.8 (5), p.5227-5232 [Periódico revisado por pares]

United States: American Chemical Society

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2
Challenges and Limitations of CMOS Scaling for FinFET and Beyond Architectures
Challenges and Limitations of CMOS Scaling for FinFET and Beyond Architectures
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Challenges and Limitations of CMOS Scaling for FinFET and Beyond Architectures

Razavieh, Ali ; Zeitzoff, Peter ; Nowak, Edward J.

IEEE transactions on nanotechnology, 2019, Vol.18, p.999-1004 [Periódico revisado por pares]

New York: IEEE

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3
Flexible Nanoscale High-Performance FinFETs
Flexible Nanoscale High-Performance FinFETs
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Flexible Nanoscale High-Performance FinFETs

Torres Sevilla, Galo A ; Ghoneim, Mohamed T ; Fahad, Hossain ; Rojas, Jhonathan P ; Hussain, Aftab M ; Hussain, Muhammad Mustafa

ACS nano, 2014-10, Vol.8 (10), p.9850-9856 [Periódico revisado por pares]

United States: American Chemical Society

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4
Flexible and Transparent Silicon-on-Polymer Based Sub-20 nm Non-planar 3D FinFET for Brain-Architecture Inspired Computation
Flexible and Transparent Silicon-on-Polymer Based Sub-20 nm Non-planar 3D FinFET for Brain-Architecture Inspired Computation
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Flexible and Transparent Silicon-on-Polymer Based Sub-20 nm Non-planar 3D FinFET for Brain-Architecture Inspired Computation

Sevilla, Galo A. Torres ; Rojas, Jhonathan P. ; Fahad, Hossain M. ; Hussain, Aftab M. ; Ghanem, Rawan ; Smith, Casey E. ; Hussain, Muhammad M.

Advanced materials (Weinheim), 2014-05, Vol.26 (18), p.2794-2799 [Periódico revisado por pares]

Germany: Blackwell Publishing Ltd

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5
InAs/GaSb thin layers directly grown on nominal (0 0 1)-Si substrate by MOVPE for the fabrication of InAs FINFET
InAs/GaSb thin layers directly grown on nominal (0 0 1)-Si substrate by MOVPE for the fabrication of InAs FINFET
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InAs/GaSb thin layers directly grown on nominal (0 0 1)-Si substrate by MOVPE for the fabrication of InAs FINFET

Cerba, T. ; Hauchecorne, P. ; Martin, M. ; Moeyaert, J. ; Alcotte, R. ; Salem, B. ; Eustache, E. ; Bezard, P. ; Chevalier, X. ; Lombard, G. ; Bassani, F. ; David, S. ; Beainy, G. ; Tournié, E. ; Patriarche, G. ; Boutry, H. ; Bawedin, M. ; Baron, T.

Journal of crystal growth, 2019-03, Vol.510, p.18-22 [Periódico revisado por pares]

Amsterdam: Elsevier B.V

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6
Analog/RF and Linearity Performance Assessment of a Negative Capacitance FinFET using High Threshold Voltage Techniques
Analog/RF and Linearity Performance Assessment of a Negative Capacitance FinFET using High Threshold Voltage Techniques
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Analog/RF and Linearity Performance Assessment of a Negative Capacitance FinFET using High Threshold Voltage Techniques

Jaisawal, Rajeewa Kumar ; Rathore, Sunil ; Kondekar, P. N. ; Bagga, Navjeet

IEEE transactions on nanotechnology, 2023-01, Vol.22, p.1-7 [Periódico revisado por pares]

New York: IEEE

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7
Enhanced Magnetic Field Sensing With MAGNC-FinFET: A Current Mode Hall Effect Approach
Enhanced Magnetic Field Sensing With MAGNC-FinFET: A Current Mode Hall Effect Approach
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Enhanced Magnetic Field Sensing With MAGNC-FinFET: A Current Mode Hall Effect Approach

Maurya, Ravindra Kumar ; Debnath, Radhe Gobinda ; Saha, Rajesh ; Bhowmick, Brinda

IEEE transactions on nanotechnology, 2024, Vol.23, p.250-256 [Periódico revisado por pares]

New York: IEEE

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8
A novel approach to Si0.5Ge0.5 channel FinFET fabrication: utilizing a three-layer SiGe strain relaxation buffer and In-Situ phosphorus doping
A novel approach to Si0.5Ge0.5 channel FinFET fabrication: utilizing a three-layer SiGe strain relaxation buffer and In-Situ phosphorus doping
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A novel approach to Si0.5Ge0.5 channel FinFET fabrication: utilizing a three-layer SiGe strain relaxation buffer and In-Situ phosphorus doping

Li, Yan ; Luo, Huaizhi ; Chen, Anlan ; Mao, Xiaotong ; Zhao, Fei ; Luo, Jun ; Li, Yongliang

Journal of materials science. Materials in electronics, 2024-02, Vol.35 (6), p.375, Article 375 [Periódico revisado por pares]

New York: Springer US

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9
Demonstration of an UltraLow Energy PD-SOI FinFET Based LIF Neuron for SNN
Demonstration of an UltraLow Energy PD-SOI FinFET Based LIF Neuron for SNN
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Demonstration of an UltraLow Energy PD-SOI FinFET Based LIF Neuron for SNN

Rajakumari, V ; Pradhan, K P

IEEE transactions on nanotechnology, 2022, Vol.21, p.434-441 [Periódico revisado por pares]

New York: IEEE

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10
High-Performance P- and N-Type SiGe/Si Strained Super-Lattice FinFET and CMOS Inverter: Comparison of Si and SiGe FinFET
High-Performance P- and N-Type SiGe/Si Strained Super-Lattice FinFET and CMOS Inverter: Comparison of Si and SiGe FinFET
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High-Performance P- and N-Type SiGe/Si Strained Super-Lattice FinFET and CMOS Inverter: Comparison of Si and SiGe FinFET

Yao, Yi-Ju ; Yang, Ching-Ru ; Tseng, Ting-Yu ; Chang, Heng-Jia ; Lin, Tsai-Jung ; Luo, Guang-Li ; Hou, Fu-Ju ; Wu, Yung-Chun ; Chang-Liao, Kuei-Shu

Nanomaterials (Basel, Switzerland), 2023-04, Vol.13 (8), p.1310 [Periódico revisado por pares]

Switzerland: MDPI AG

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