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11
PARSECSs: Evaluating the Impact of Task Parallelism in the PARSEC Benchmark Suite
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PARSECSs: Evaluating the Impact of Task Parallelism in the PARSEC Benchmark Suite

Chasapis, Dimitrios ; Casas, Marc ; Moretó, Miquel ; Vidal, Raul ; Ayguadé, Eduard ; Labarta, Jesús ; Valero, Mateo

ACM transactions on architecture and code optimization, 2016-01, Vol.12 (4), p.1-22 [Periódico revisado por pares]

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12
Stencil codes on a vector length agnostic architecture
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Ata de Congresso
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Stencil codes on a vector length agnostic architecture

Armejach, Adrià ; Caminal, Helena ; Cebrian, Juan M. ; González-Alberquilla, Rekai ; Adeniyi-Jones, Chris ; Valero, Mateo ; Casas, Marc ; Moretó, Miquel

Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques, 2018, p.1-12

New York, NY, USA: ACM

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13
Resource-Aware Task Scheduling
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Artigo
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Resource-Aware Task Scheduling

Tillenius, Martin ; Larsson, Elisabeth ; Badia, Rosa M. ; Martorell, Xavier

ACM transactions on embedded computing systems, 2015-01, Vol.14 (1), p.1-25 [Periódico revisado por pares]

Association for Computing Machinery (ACM)

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14
Synthesis of synchronous elastic architectures
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Ata de Congresso
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Synthesis of synchronous elastic architectures

Cortadella, Jordi ; Kishinevsky, Mike ; Grundmann, Bill

2006 43rd ACM/IEEE Design Automation Conference, 2006, p.657-662

New York, NY, USA: ACM

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15
CODOMs: Protecting software with Code-centric memory Domains
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CODOMs: Protecting software with Code-centric memory Domains

Vilanova, Lluis ; Ben-Yehuda, Muli ; Navarro, Nacho ; Etsion, Yoav ; Valero, Mateo

2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA), 2014, p.469-480

IEEE

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16
Exact and Heuristic Allocation of Multi-kernel Applications to Multi-FPGA Platforms
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Exact and Heuristic Allocation of Multi-kernel Applications to Multi-FPGA Platforms

Shan, Junnan ; Casu, Mario R. ; Cortadella, Jordi ; Lavagno, Luciano ; Lazarescu, Mihai T.

Proceedings of the 56th Annual Design Automation Conference 2019, 2019, p.1-6

New York, NY, USA: ACM

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17
Holistic Slowdown Driven Scheduling and Resource Management for Malleable Jobs
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Holistic Slowdown Driven Scheduling and Resource Management for Malleable Jobs

D'Amico, Marco ; Jokanovic, Ana ; Corbalan, Julita

Proceedings of the 48th International Conference on Parallel Processing, 2019, p.1-10

New York, NY, USA: ACM

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18
Runtime-Guided Management of Scratchpad Memories in Multicore Architectures
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Runtime-Guided Management of Scratchpad Memories in Multicore Architectures

Alvarez, Lluc ; Moreto, Miquel ; Casas, Marc ; Castillo, Emilio ; Martorell, Xavier ; Labarta, Jesus ; Ayguade, Eduard ; Valero, Mateo

2015 International Conference on Parallel Architecture and Compilation (PACT), 2015, p.379-391

IEEE

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19
Assisting Static Compiler Vectorization with a Speculative Dynamic Vectorizer in an HW/SW Codesigned Environment
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Assisting Static Compiler Vectorization with a Speculative Dynamic Vectorizer in an HW/SW Codesigned Environment

Kumar, Rakesh ; Martínez, Alejandro ; González, Antonio

ACM transactions on computer systems, 2016-01, Vol.33 (4), p.1-33 [Periódico revisado por pares]

New York: Association for Computing Machinery

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20
Penelope: The NBTI-Aware Processor
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Penelope: The NBTI-Aware Processor

Abella, J. ; Vera, X. ; Gonzalez, A.

40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 2007), 2007, p.85-96

IEEE

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