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Hardware-Based Trusted Computing Architectures for Isolation and Attestation
Hardware-Based Trusted Computing Architectures for Isolation and Attestation
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Hardware-Based Trusted Computing Architectures for Isolation and Attestation

Maene, Pieter ; Gotzfried, Johannes ; de Clercq, Ruan ; Muller, Tilo ; Freiling, Felix ; Verbauwhede, Ingrid

IEEE transactions on computers, 2018-03, Vol.67 (3), p.361-374 [Periódico revisado por pares]

New York: IEEE

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2
Elliptic-Curve-Based Security Processor for RFID
Elliptic-Curve-Based Security Processor for RFID
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Elliptic-Curve-Based Security Processor for RFID

Yong Ki Lee ; Sakiyama, K. ; Batina, L. ; Verbauwhede, I.

IEEE transactions on computers, 2008-11, Vol.57 (11), p.1514-1527 [Periódico revisado por pares]

New York: IEEE

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3
An Ontology-Based Method for HW/SW Architecture Reconstruction
An Ontology-Based Method for HW/SW Architecture Reconstruction
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An Ontology-Based Method for HW/SW Architecture Reconstruction

Musavi, Seyyedeh Atefeh ; Hashemi, Mahmoud Reza

IEEE transactions on computers, 2019-07, Vol.68 (7), p.1007-1018 [Periódico revisado por pares]

IEEE

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4
NV-Clustering: Normally-Off Computing Using Non-Volatile Datapaths
NV-Clustering: Normally-Off Computing Using Non-Volatile Datapaths
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NV-Clustering: Normally-Off Computing Using Non-Volatile Datapaths

Roohi, Arman ; DeMara, Ronald F.

IEEE transactions on computers, 2018-07, Vol.67 (7), p.949-959 [Periódico revisado por pares]

New York: IEEE

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5
An Open-Source Platform for High-Performance Non-Coherent On-Chip Communication
An Open-Source Platform for High-Performance Non-Coherent On-Chip Communication
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An Open-Source Platform for High-Performance Non-Coherent On-Chip Communication

Kurth, Andreas ; Ronninger, Wolfgang ; Benz, Thomas ; Cavalcante, Matheus ; Schuiki, Fabian ; Zaruba, Florian ; Benini, Luca

IEEE transactions on computers, 2021-08, p.1-1 [Periódico revisado por pares]

IEEE

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6
A systematic approach to exploring embedded system architectures at multiple abstraction levels
A systematic approach to exploring embedded system architectures at multiple abstraction levels
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A systematic approach to exploring embedded system architectures at multiple abstraction levels

Pimentel, A.D. ; Erbas, C. ; Polstra, S.

IEEE transactions on computers, 2006-02, Vol.55 (2), p.99-112 [Periódico revisado por pares]

New York: IEEE

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7
Snitch: A Tiny Pseudo Dual-Issue Processor for Area and Energy Efficient Execution of Floating-Point Intensive Workloads
Snitch: A Tiny Pseudo Dual-Issue Processor for Area and Energy Efficient Execution of Floating-Point Intensive Workloads
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Snitch: A Tiny Pseudo Dual-Issue Processor for Area and Energy Efficient Execution of Floating-Point Intensive Workloads

Zaruba, Florian ; Schuiki, Fabian ; Hoefler, Torsten ; Benini, Luca

IEEE transactions on computers, 2021-11, Vol.70 (11), p.1845-1860 [Periódico revisado por pares]

IEEE

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8
LUTNet: Learning FPGA Configurations for Highly Efficient Neural Network Inference
LUTNet: Learning FPGA Configurations for Highly Efficient Neural Network Inference
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LUTNet: Learning FPGA Configurations for Highly Efficient Neural Network Inference

Wang, Erwei ; Davis, James J. ; Cheung, Peter Y. K. ; Constantinides, George A.

IEEE transactions on computers, 2020-12, Vol.69 (12), p.1795-1808 [Periódico revisado por pares]

IEEE

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9
A Multi-Resolution FPGA-Based Architecture for Real-Time Edge and Corner Detection
A Multi-Resolution FPGA-Based Architecture for Real-Time Edge and Corner Detection
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A Multi-Resolution FPGA-Based Architecture for Real-Time Edge and Corner Detection

Possa, Paulo Ricardo ; Mahmoudi, Sidi Ahmed ; Harb, Naim ; Valderrama, Carlos ; Manneback, Pierre

IEEE transactions on computers, 2014-10, Vol.63 (10), p.2376-2388 [Periódico revisado por pares]

New York: IEEE

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10
Built-in Security Computer: Deploying Security-First Architecture Using Active Security Processor
Built-in Security Computer: Deploying Security-First Architecture Using Active Security Processor
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Built-in Security Computer: Deploying Security-First Architecture Using Active Security Processor

Meng, Dan ; Hou, Rui ; Shi, Gang ; Tu, Bibo ; Yu, Aimin ; Zhu, Ziyuan ; Jia, Xiaoqi ; Wen, Yu ; Yang, Yun

IEEE transactions on computers, 2020-11, Vol.69 (11), p.1571-1583 [Periódico revisado por pares]

IEEE

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