Result Number | Material Type | Add to My Shelf Action | Record Details and Options |
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1 |
Material Type: Ata de Congresso
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Iterative-based minimization of unary 4-valued functions for current-mode CMOS realizationAbd-El-Barr, M. ; Al-Awami, L.Proceedings. 34th International Symposium on Multiple-Valued Logic, 2004, p.315-320Los Alamitos CA: IEEETexto completo disponível |
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Material Type: Ata de Congresso
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Fitted Elmore delay: a simple and accurate interconnect delay modelAbou-Seido, A.I. ; Nowak, B. ; Chu, C.Proceedings, IEEE International Conference on Computer Design, 2002, p.422-427Piscataway NJ: IEEETexto completo disponível |
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Material Type: Ata de Congresso
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On the optimisation of Reed-Muller expressionsAdams, K.J. ; McGregor, J.Proceedings. 34th International Symposium on Multiple-Valued Logic, 2004, p.168-176Los Alamitos CA: IEEETexto completo disponível |
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Material Type: Ata de Congresso
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Speculative trace scheduling in VLIW processorsAgarwal, M. ; Nandy, S.K.Proceedings, IEEE International Conference on Computer Design, 2002, p.408-413Piscataway NJ: IEEETexto completo disponível |
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Material Type: Ata de Congresso
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Defining wakeup width for efficient dynamic schedulingAggarwal, A. ; Franklin, M. ; Ergin, O.IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings, 2004, p.36-41Los Alamitos CA: IEEETexto completo disponível |
6 |
Material Type: Ata de Congresso
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Uniform description of calculi for all t-norm logicsAguzzoli, S.Proceedings. 34th International Symposium on Multiple-Valued Logic, 2004, p.38-43Los Alamitos CA: IEEETexto completo disponível |
7 |
Material Type: Ata de Congresso
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Evaluating the Imagine Stream ArchitectureAhn, Jung Ho ; Dally, William J. ; Khailany, Brucek ; Kapasi, Ujval J. ; Das, AbhishekInternational Symposium on Computer Architecture: Proceedings of the 31st annual international symposium on Computer architecture : Munchen, Germany; 19-23 June 2004, 2004, p.14-14Washington, DC, USA: IEEE Computer SocietyTexto completo disponível |
8 |
Material Type: Ata de Congresso
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Feature extraction based built-in alternate test of RF components using a noise referenceAkbay, S.S. ; Chatterjee, A.22nd IEEE VLSI Test Symposium, 2004. Proceedings, 2004, p.273-278Piscataway NJ: IEEETexto completo disponível |
9 |
Material Type: Ata de Congresso
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Adaptive Cache Compression for High-Performance ProcessorsAlameldeen, Alaa R. ; Wood, David A.International Symposium on Computer Architecture: Proceedings of the 31st annual international symposium on Computer architecture : Munchen, Germany; 19-23 June 2004, 2004, p.212-212Washington, DC, USA: IEEE Computer SocietyTexto completo disponível |
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Material Type: Ata de Congresso
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An FPGA implementation for a high throughput adaptive filter using distributed arithmeticAllred, D.J. ; Huang, W. ; Krishnan, V. ; Yoo, H. ; Anderson, D.V.12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2004, p.324-325Los Alamitos CA: IEEETexto completo disponível |