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Memristive and CMOS Devices for Neuromorphic Computing
Memristive and CMOS Devices for Neuromorphic Computing
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Memristive and CMOS Devices for Neuromorphic Computing

Milo, Valerio ; Malavena, Gerardo ; Monzio Compagnoni, Christian ; Ielmini, Daniele

Materials, 2020-01, Vol.13 (1), p.166 [Periódico revisado por pares]

Switzerland: MDPI AG

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12
How Frequency Injection Locking Can Train Oscillatory Neural Networks to Compute in Phase
How Frequency Injection Locking Can Train Oscillatory Neural Networks to Compute in Phase
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How Frequency Injection Locking Can Train Oscillatory Neural Networks to Compute in Phase

Todri-Sanial, Aida ; Carapezzi, Stefania ; Delacour, Corentin ; Abernot, Madeleine ; Gil, Thierry ; Corti, Elisabetta ; Karg, Siegfried F. ; Nunez, Juan ; Jimenez, Manuel ; Avedillo, Maria J. ; Linares-Barranco, Bernabe

IEEE transaction on neural networks and learning systems, 2022-05, Vol.33 (5), p.1996-2009

United States: IEEE

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13
Quantifying Human Experience in Architectural Spaces with Integrated Virtual Reality and Body Sensor Networks
Quantifying Human Experience in Architectural Spaces with Integrated Virtual Reality and Body Sensor Networks
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Quantifying Human Experience in Architectural Spaces with Integrated Virtual Reality and Body Sensor Networks

Ergan, Semiha ; Radwan, Ahmed ; Zou, Zhengbo ; Tseng, Hua-an ; Han, Xue

Journal of computing in civil engineering, 2019-03, Vol.33 (2) [Periódico revisado por pares]

New York: American Society of Civil Engineers

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14
CayleyNets: Graph Convolutional Neural Networks With Complex Rational Spectral Filters
CayleyNets: Graph Convolutional Neural Networks With Complex Rational Spectral Filters
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CayleyNets: Graph Convolutional Neural Networks With Complex Rational Spectral Filters

Levie, Ron ; Monti, Federico ; Bresson, Xavier ; Bronstein, Michael M.

IEEE transactions on signal processing, 2019-01, Vol.67 (1), p.97-109 [Periódico revisado por pares]

New York: IEEE

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15
Differentiable neural architecture search for optimal spatial/temporal brain function network decomposition
Differentiable neural architecture search for optimal spatial/temporal brain function network decomposition
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Differentiable neural architecture search for optimal spatial/temporal brain function network decomposition

Li, Qing ; Wu, Xia ; Liu, Tianming

Medical image analysis, 2021-04, Vol.69, p.101974-101974, Article 101974 [Periódico revisado por pares]

Netherlands: Elsevier B.V

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16
HTTU-Net: Hybrid Two Track U-Net for Automatic Brain Tumor Segmentation
HTTU-Net: Hybrid Two Track U-Net for Automatic Brain Tumor Segmentation
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HTTU-Net: Hybrid Two Track U-Net for Automatic Brain Tumor Segmentation

Aboelenein, Nagwa M. ; Songhao, Piao ; Koubaa, Anis ; Noor, Alam ; Afifi, Ahmed

IEEE access, 2020, Vol.8, p.101406-101415 [Periódico revisado por pares]

Piscataway: IEEE

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17
Advancing Neuromorphic Computing With Loihi: A Survey of Results and Outlook
Advancing Neuromorphic Computing With Loihi: A Survey of Results and Outlook
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Advancing Neuromorphic Computing With Loihi: A Survey of Results and Outlook

Davies, Mike ; Wild, Andreas ; Orchard, Garrick ; Sandamirskaya, Yulia ; Guerra, Gabriel A. Fonseca ; Joshi, Prasad ; Plank, Philipp ; Risbud, Sumedh R.

Proceedings of the IEEE, 2021-05, Vol.109 (5), p.911-934 [Periódico revisado por pares]

New York: IEEE

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18
Variable Binding for Sparse Distributed Representations: Theory and Applications
Variable Binding for Sparse Distributed Representations: Theory and Applications
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Variable Binding for Sparse Distributed Representations: Theory and Applications

Frady, Edward Paxon ; Kleyko, Denis ; Sommer, Friedrich T.

IEEE transaction on neural networks and learning systems, 2023-05, Vol.34 (5), p.2191-2204

United States: IEEE

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19
SPANNER: A Self-Repairing Spiking Neural Network Hardware Architecture
SPANNER: A Self-Repairing Spiking Neural Network Hardware Architecture
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SPANNER: A Self-Repairing Spiking Neural Network Hardware Architecture

Liu, Junxiu ; Harkin, Jim ; Maguire, Liam P. ; McDaid, Liam J. ; Wade, John J.

IEEE transaction on neural networks and learning systems, 2018-04, Vol.29 (4), p.1287-1300

United States: IEEE

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20
An Energy-Efficient CMOS Dual-Mode Array Architecture for High-Density ECoG-Based Brain-Machine Interfaces
An Energy-Efficient CMOS Dual-Mode Array Architecture for High-Density ECoG-Based Brain-Machine Interfaces
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An Energy-Efficient CMOS Dual-Mode Array Architecture for High-Density ECoG-Based Brain-Machine Interfaces

Malekzadeh-Arasteh, Omid ; Pu, Haoran ; Lim, Jeffrey ; Liu, Charles Yu ; Do, An H. ; Nenadic, Zoran ; Heydari, Payam

IEEE transactions on biomedical circuits and systems, 2020-04, Vol.14 (2), p.332-342 [Periódico revisado por pares]

United States: IEEE

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