skip to main content
Idioma:
Primo Advanced Search
Primo Advanced Search Query Term
Primo Advanced Search Query Term
Primo Advanced Search Query Term
Primo Advanced Search prefilters
Busca Simples
Resultados 1 2 3 4 5 next page
Refinado por: assunto: Science & Technology remover Ieice Transactions On Fundamentals Of Electronics, Communications And Computer Sciences remover
Result Number Material Type Add to My Shelf Action Record Details and Options
1
A System Architecture for Mobility as a Service in Autonomous Transportation Systems
A System Architecture for Mobility as a Service in Autonomous Transportation Systems
Material Type:
Artigo 		Adicionar ao Meu Espaço

A System Architecture for Mobility as a Service in Autonomous Transportation Systems

JIAN, Weitao ; CAI, Ming ; HUANG, Wei ; LI, Shichang

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2023/12/01, Vol.E106.A(12), pp.1555-1568 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

Texto completo disponível

Citações Citado por
2
Prime-Factor GFFT Architecture for Fast Frequency Domain Decoding of Cyclic Codes
Prime-Factor GFFT Architecture for Fast Frequency Domain Decoding of Cyclic Codes
Material Type:
Artigo 		Adicionar ao Meu Espaço

Prime-Factor GFFT Architecture for Fast Frequency Domain Decoding of Cyclic Codes

CHANG, Yanyan ; ZHANG, Wei ; WANG, Hao ; SHI, Lina ; LIU, Yanyan

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2024/01/01, Vol.E107.A(1), pp.174-177 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

Texto completo disponível

Citações Citado por
3
An eFPGA Generation Suite with Customizable Architecture and IDE
An eFPGA Generation Suite with Customizable Architecture and IDE
Material Type:
Artigo 		Adicionar ao Meu Espaço

An eFPGA Generation Suite with Customizable Architecture and IDE

KUGA, Morihiro ; ZHAO, Qian ; NAKAZATO, Yuya ; AMAGASAKI, Motoki ; IIDA, Masahiro

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2023/03/01, Vol.E106.A(3), pp.560-574 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

Texto completo disponível

Citações Citado por
4
Vehicle Re-Identification Based on Quadratic Split Architecture and Auxiliary Information Embedding
Vehicle Re-Identification Based on Quadratic Split Architecture and Auxiliary Information Embedding
Material Type:
Artigo 		Adicionar ao Meu Espaço

Vehicle Re-Identification Based on Quadratic Split Architecture and Auxiliary Information Embedding

LU, Tongwei ; ZHANG, Hao ; MIN, Feng ; JIA, Shihai

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2022/12/01, Vol.E105.A(12), pp.1621-1625 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

Texto completo disponível

Citações Citado por
5
Vehicle Re-identification Based on Quadratic Split Architecture and Auxiliary Information Embedding
Vehicle Re-identification Based on Quadratic Split Architecture and Auxiliary Information Embedding
Material Type:
Artigo 		Adicionar ao Meu Espaço

Vehicle Re-identification Based on Quadratic Split Architecture and Auxiliary Information Embedding

LU, Tongwei ; ZHANG, Hao ; MIN, Feng ; JIA, Shihai

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2022, pp.2022EAL2008 [Periódico revisado por pares]

The Institute of Electronics, Information and Communication Engineers

Texto completo disponível

Citações Citado por
6
High Performance Application Specific Stream Architecture for Hardware Acceleration of HOG-SVM on FPGA
High Performance Application Specific Stream Architecture for Hardware Acceleration of HOG-SVM on FPGA
Material Type:
Artigo 		Adicionar ao Meu Espaço

High Performance Application Specific Stream Architecture for Hardware Acceleration of HOG-SVM on FPGA

RANAWAKA, Piyumal ; EKPANYAPONG, Mongkol ; TAVARES, Adriano ; DAILEY, Mathew ; ATHIKULWONGSE, Krit ; SILVA, Vitor

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2019/12/01, Vol.E102.A(12), pp.1792-1803 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

Texto completo disponível

Citações Citado por
7
Simultaneous Scheduling and Core-Type Optimization for Moldable Fork-Join Tasks on Heterogeneous Multicores
Simultaneous Scheduling and Core-Type Optimization for Moldable Fork-Join Tasks on Heterogeneous Multicores
Material Type:
Artigo 		Adicionar ao Meu Espaço

Simultaneous Scheduling and Core-Type Optimization for Moldable Fork-Join Tasks on Heterogeneous Multicores

NISHIKAWA, Hiroki ; SHIMADA, Kana ; TANIGUCHI, Ittetsu ; TOMIYAMA, Hiroyuki

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2022/03/01, Vol.E105.A(3), pp.540-548 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

Texto completo disponível

Citações Citado por
8
Adaptive Channel Scheduling for Acceleration and Fine Control of RNN-Based Image Compression
Adaptive Channel Scheduling for Acceleration and Fine Control of RNN-Based Image Compression
Material Type:
Artigo 		Adicionar ao Meu Espaço

Adaptive Channel Scheduling for Acceleration and Fine Control of RNN-Based Image Compression

KIM, Sang Hoon ; KO, Jong Hwan

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2023/09/01, Vol.E106.A(9), pp.1211-1215 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

Texto completo disponível

Citações Citado por
9
Convergence Acceleration via Chebyshev Step: Plausible Interpretation of Deep-Unfolded Gradient Descent
Convergence Acceleration via Chebyshev Step: Plausible Interpretation of Deep-Unfolded Gradient Descent
Material Type:
Artigo 		Adicionar ao Meu Espaço

Convergence Acceleration via Chebyshev Step: Plausible Interpretation of Deep-Unfolded Gradient Descent

TAKABE, Satoshi ; WADAYAMA, Tadashi

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2022/08/01, Vol.E105.A(8), pp.1110-1120 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

Texto completo disponível

Citações Citado por
10
Design Verification Methodology of Pipelined RISC-V Processor Using C2RTL Framework
Design Verification Methodology of Pipelined RISC-V Processor Using C2RTL Framework
Material Type:
Artigo 		Adicionar ao Meu Espaço

Design Verification Methodology of Pipelined RISC-V Processor Using C2RTL Framework

YOSHIYA, Eiji ; NAKANISHI, Tomoya ; ISSHIKI, Tsuyoshi

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2022/07/01, Vol.E105.A(7), pp.1061-1069 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

Texto completo disponível

Citações Citado por
Resultados 1 2 3 4 5 next page

Personalize Seus Resultados

  1. Editar

Refine Search Results

Expandir Meus Resultados

  1.   

  • Realização: ABCD-USP USP   Logos de Redes Sociais: Freepik

Buscando em bases de dados remotas. Favor aguardar.