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Refinado por: Base de dados/Biblioteca: IEEE Open Access Journals remover Nome da Publicação: Ieee Transactions On Computer-Aided Design Of Integrated Circuits And Systems remover idioma: Inglês remover
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Flexible and Efficient QoS Provisioning in AXI4-Based Network-on-Chip Architecture
Flexible and Efficient QoS Provisioning in AXI4-Based Network-on-Chip Architecture
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Flexible and Efficient QoS Provisioning in AXI4-Based Network-on-Chip Architecture

Wang, Boqian ; Lu, Zhonghai

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-05, Vol.41 (5), p.1523-1536 [Periódico revisado por pares]

New York: IEEE

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2
Gibbon: An Efficient Co-Exploration Framework of NN model and Processing-In-Memory Architecture
Gibbon: An Efficient Co-Exploration Framework of NN model and Processing-In-Memory Architecture
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Gibbon: An Efficient Co-Exploration Framework of NN model and Processing-In-Memory Architecture

Sun, Hanbo ; Zhu, Zhenhua ; Wang, Chenyu ; Ning, Xuefei ; Dai, Guohao ; Yang, Huazhong ; Wang, Yu

IEEE transactions on computer-aided design of integrated circuits and systems, 2023-11, Vol.42 (11), p.1-1 [Periódico revisado por pares]

New York: IEEE

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3
SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput
SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput
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SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput

Ben-Hur, Rotem ; Ronen, Ronny ; Haj-Ali, Ameer ; Bhattacharjee, Debjyoti ; Eliahu, Adi ; Peled, Natan ; Kvatinsky, Shahar

IEEE transactions on computer-aided design of integrated circuits and systems, 2020-10, Vol.39 (10), p.2434-2447 [Periódico revisado por pares]

New York: IEEE

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4
Blocks: Challenging SIMDs and VLIWs With a Reconfigurable Architecture
Blocks: Challenging SIMDs and VLIWs With a Reconfigurable Architecture
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Blocks: Challenging SIMDs and VLIWs With a Reconfigurable Architecture

Wijtvliet, M. ; Kumar, A. ; Corporaal, H.

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-09, Vol.41 (9), p.2915-2928 [Periódico revisado por pares]

IEEE

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5
Morphling: A Reconfigurable Architecture for Tensor Computation
Morphling: A Reconfigurable Architecture for Tensor Computation
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Morphling: A Reconfigurable Architecture for Tensor Computation

Lu, Liqiang ; Liang, Yun

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-11, Vol.41 (11), p.4733-4746 [Periódico revisado por pares]

New York: IEEE

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6
Rubick: A Unified Infrastructure for Analyzing, Exploring, and Implementing Spatial Architectures via Dataflow Decomposition
Rubick: A Unified Infrastructure for Analyzing, Exploring, and Implementing Spatial Architectures via Dataflow Decomposition
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Rubick: A Unified Infrastructure for Analyzing, Exploring, and Implementing Spatial Architectures via Dataflow Decomposition

Lu, Liqiang ; Luo, Zizhang ; Zheng, Size ; Yin, Jieming ; Cong, Jason ; Liang, Yun ; Yin, Jianwei

IEEE transactions on computer-aided design of integrated circuits and systems, 2024-04, Vol.43 (4), p.1177-1190 [Periódico revisado por pares]

IEEE

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7
Efficient Encodings for Scalable Exploration of Cyber-Physical System Architectures
Efficient Encodings for Scalable Exploration of Cyber-Physical System Architectures
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Efficient Encodings for Scalable Exploration of Cyber-Physical System Architectures

Kirov, Dmitrii ; Nuzzo, Pierluigi ; Sangiovanni-Vincentelli, Alberto ; Passerone, Roberto

IEEE transactions on computer-aided design of integrated circuits and systems, 2024-01, Vol.43 (1), p.1-1 [Periódico revisado por pares]

IEEE

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8
A Simulation Framework for Memristor-Based Heterogeneous Computing Architectures
A Simulation Framework for Memristor-Based Heterogeneous Computing Architectures
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A Simulation Framework for Memristor-Based Heterogeneous Computing Architectures

Liu, Haikun ; Xu, Jiahong ; Liao, Xiaofei ; Jin, Hai ; Zhang, Yu ; Mao, Fubing

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-12, Vol.41 (12), p.5476-5488 [Periódico revisado por pares]

New York: IEEE

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9
Miss Penalty Aware Cache Replacement for Hybrid Memory Systems
Miss Penalty Aware Cache Replacement for Hybrid Memory Systems
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Miss Penalty Aware Cache Replacement for Hybrid Memory Systems

Jin, Hai ; Chen, Di ; Liu, Haikun ; Liao, Xiaofei ; Guo, Rentong ; Zhang, Yu

IEEE transactions on computer-aided design of integrated circuits and systems, 2020-12, Vol.39 (12), p.4669-4682 [Periódico revisado por pares]

New York: IEEE

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10
An Efficient Application Mapping Approach for the Co-Optimization of Reliability, Energy, and Performance in Reconfigurable NoC Architectures
An Efficient Application Mapping Approach for the Co-Optimization of Reliability, Energy, and Performance in Reconfigurable NoC Architectures
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An Efficient Application Mapping Approach for the Co-Optimization of Reliability, Energy, and Performance in Reconfigurable NoC Architectures

Wu, Chen ; Deng, Chenchen ; Liu, Leibo ; Han, Jie ; Chen, Jiqiang ; Yin, Shouyi ; Wei, Shaojun

IEEE transactions on computer-aided design of integrated circuits and systems, 2015-08, Vol.34 (8), p.1264-1277 [Periódico revisado por pares]

New York: IEEE

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