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Refinado por: Nome da Publicação: Ieee Transactions On Computer-Aided Design Of Integrated Circuits And Systems remover idioma: Japonês remover nível superior: Revistas revisadas por pares remover
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LCHR-TSV: Novel Low Cost and Highly Repairable Honeycomb-Based TSV Redundancy Architecture for Clustered Faults
LCHR-TSV: Novel Low Cost and Highly Repairable Honeycomb-Based TSV Redundancy Architecture for Clustered Faults
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LCHR-TSV: Novel Low Cost and Highly Repairable Honeycomb-Based TSV Redundancy Architecture for Clustered Faults

Ni, Tianming ; Yao, Yao ; Chang, Hao ; Lu, Lin ; Liang, Huaguo ; Yan, Aibin ; Huang, Zhengfeng ; Wen, Xiaoqing

IEEE transactions on computer-aided design of integrated circuits and systems, 2020-10, Vol.39 (10), p.2938-2951 [Periódico revisado por pares]

New York: IEEE

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2
TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip
TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip
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TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip

Akopyan, Filipp ; Sawada, Jun ; Cassidy, Andrew ; Alvarez-Icaza, Rodrigo ; Arthur, John ; Merolla, Paul ; Imam, Nabil ; Nakamura, Yutaka ; Datta, Pallab ; Gi-Joon Nam ; Taba, Brian ; Beakes, Michael ; Brezzo, Bernard ; Kuang, Jente B. ; Manohar, Rajit ; Risk, William P. ; Jackson, Bryan ; Modha, Dharmendra S.

IEEE transactions on computer-aided design of integrated circuits and systems, 2015-10, Vol.34 (10), p.1537-1557 [Periódico revisado por pares]

New York: IEEE

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3
Caffeine: Toward Uniformed Representation and Acceleration for Deep Convolutional Neural Networks
Caffeine: Toward Uniformed Representation and Acceleration for Deep Convolutional Neural Networks
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Caffeine: Toward Uniformed Representation and Acceleration for Deep Convolutional Neural Networks

Zhang, Chen ; Sun, Guangyu ; Fang, Zhenman ; Zhou, Peipei ; Pan, Peichen ; Cong, Jason

IEEE transactions on computer-aided design of integrated circuits and systems, 2019-11, Vol.38 (11), p.2072-2085 [Periódico revisado por pares]

New York: IEEE

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4
Exact Synthesis of Nearest Neighbor Compliant Quantum Circuits in 2-D Architecture and Its Application to Large-Scale Circuits
Exact Synthesis of Nearest Neighbor Compliant Quantum Circuits in 2-D Architecture and Its Application to Large-Scale Circuits
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Exact Synthesis of Nearest Neighbor Compliant Quantum Circuits in 2-D Architecture and Its Application to Large-Scale Circuits

Ding, Jingwen ; Yamashita, Shigeru

IEEE transactions on computer-aided design of integrated circuits and systems, 2020-05, Vol.39 (5), p.1045-1058 [Periódico revisado por pares]

New York: IEEE

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5
From Layout to System: Early Stage Power Delivery and Architecture Co-Exploration
From Layout to System: Early Stage Power Delivery and Architecture Co-Exploration
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From Layout to System: Early Stage Power Delivery and Architecture Co-Exploration

Zhuo, Cheng ; Unda, Kassan ; Shi, Yiyu ; Shih, Wei-Kai

IEEE transactions on computer-aided design of integrated circuits and systems, 2019-07, Vol.38 (7), p.1291-1304 [Periódico revisado por pares]

New York: IEEE

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6
Microprocessor Optimizations for the Internet of Things: A Survey
Microprocessor Optimizations for the Internet of Things: A Survey
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Microprocessor Optimizations for the Internet of Things: A Survey

Adegbija, Tosiron ; Rogacs, Anita ; Patel, Chandrakant ; Gordon-Ross, Ann

IEEE transactions on computer-aided design of integrated circuits and systems, 2018-01, Vol.37 (1), p.7-20 [Periódico revisado por pares]

IEEE

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7
X-CGRA: An Energy-Efficient Approximate Coarse-Grained Reconfigurable Architecture
X-CGRA: An Energy-Efficient Approximate Coarse-Grained Reconfigurable Architecture
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X-CGRA: An Energy-Efficient Approximate Coarse-Grained Reconfigurable Architecture

Akbari, Omid ; Kamal, Mehdi ; Afzali-Kusha, Ali ; Pedram, Massoud ; Shafique, Muhammad

IEEE transactions on computer-aided design of integrated circuits and systems, 2020-10, Vol.39 (10), p.2558-2571 [Periódico revisado por pares]

New York: IEEE

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8
MNSIM: Simulation Platform for Memristor-Based Neuromorphic Computing System
MNSIM: Simulation Platform for Memristor-Based Neuromorphic Computing System
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MNSIM: Simulation Platform for Memristor-Based Neuromorphic Computing System

Xia, Lixue ; Li, Boxun ; Tang, Tianqi ; Gu, Peng ; Chen, Pai-Yu ; Yu, Shimeng ; Cao, Yu ; Wang, Yu ; Xie, Yuan ; Yang, Huazhong

IEEE transactions on computer-aided design of integrated circuits and systems, 2018-05, Vol.37 (5), p.1009-1022 [Periódico revisado por pares]

IEEE

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9
An Optimal Microarchitecture for Stencil Computation Acceleration Based on Nonuniform Partitioning of Data Reuse Buffers
An Optimal Microarchitecture for Stencil Computation Acceleration Based on Nonuniform Partitioning of Data Reuse Buffers
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An Optimal Microarchitecture for Stencil Computation Acceleration Based on Nonuniform Partitioning of Data Reuse Buffers

Cong, Jason ; Li, Peng ; Xiao, Bingjun ; Zhang, Peng

IEEE transactions on computer-aided design of integrated circuits and systems, 2016-03, Vol.35 (3), p.407-418 [Periódico revisado por pares]

New York: IEEE

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10
An Efficient Application Mapping Approach for the Co-Optimization of Reliability, Energy, and Performance in Reconfigurable NoC Architectures
An Efficient Application Mapping Approach for the Co-Optimization of Reliability, Energy, and Performance in Reconfigurable NoC Architectures
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An Efficient Application Mapping Approach for the Co-Optimization of Reliability, Energy, and Performance in Reconfigurable NoC Architectures

Wu, Chen ; Deng, Chenchen ; Liu, Leibo ; Han, Jie ; Chen, Jiqiang ; Yin, Shouyi ; Wei, Shaojun

IEEE transactions on computer-aided design of integrated circuits and systems, 2015-08, Vol.34 (8), p.1264-1277 [Periódico revisado por pares]

New York: IEEE

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