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Refinado por: assunto: Microelectronic Fabrication remover Microelectronic Engineering remover
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1
Redeposition in ion milling
Redeposition in ion milling
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Redeposition in ion milling

Müller, K.P. ; Pelka, J.

Microelectronic engineering, 1987, Vol.7 (1), p.91-101 [Periódico revisado por pares]

Amsterdam: Elsevier B.V

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2
Magnetically enhanced reactive ion etching (MERIE) with different field configurations
Magnetically enhanced reactive ion etching (MERIE) with different field configurations
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Magnetically enhanced reactive ion etching (MERIE) with different field configurations

Müller, K.P. ; Heinrich, F. ; Mader, H.

Microelectronic engineering, 1989, Vol.10 (1), p.55-67 [Periódico revisado por pares]

Amsterdam: Elsevier B.V

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3
High-performance VLSI photomask with a molybdenum silicide film
High-performance VLSI photomask with a molybdenum silicide film
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High-performance VLSI photomask with a molybdenum silicide film

Shigetomi, A. ; Matsuda, S. ; Watakabe, Y. ; Kato, T.

Microelectronic engineering, 1991, Vol.14 (2), p.73-86 [Periódico revisado por pares]

Amsterdam: Elsevier B.V

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4
Dry development and trilevel resist etching in a DECR reactor
Dry development and trilevel resist etching in a DECR reactor
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Dry development and trilevel resist etching in a DECR reactor

Dijkstra, J. ; van de Ven, G. ; Kalter, H.

Microelectronic engineering, 1991, Vol.14 (3), p.259-268 [Periódico revisado por pares]

Amsterdam: Elsevier B.V

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5
Three-dimensional simulation of ion-enhanced dry-etch processes
Three-dimensional simulation of ion-enhanced dry-etch processes
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Three-dimensional simulation of ion-enhanced dry-etch processes

Pelka, Joachim

Microelectronic engineering, 1991, Vol.14 (3), p.269-281 [Periódico revisado por pares]

Amsterdam: Elsevier B.V

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6
X-ray mask technology: Low-stress tungsten deposition and sub-half-micron absorber fabrication by single-layer resist
X-ray mask technology: Low-stress tungsten deposition and sub-half-micron absorber fabrication by single-layer resist
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X-ray mask technology: Low-stress tungsten deposition and sub-half-micron absorber fabrication by single-layer resist

Suzuki, K. ; Shinizu, Y.

Microelectronic engineering, 1991-09, Vol.14 (3), p.207-214 [Periódico revisado por pares]

Amsterdam: Elsevier B.V

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7
Electronic study of plasma-induced damage in GaAs heterostructures
Electronic study of plasma-induced damage in GaAs heterostructures
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Electronic study of plasma-induced damage in GaAs heterostructures

Zappe, Hans P.

Microelectronic engineering, 1993-05, Vol.20 (3), p.227-239 [Periódico revisado por pares]

Amsterdam: Elsevier B.V

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8
Process design for plasma etching of polysilicon/silicon nitride/polysilicon sandwich structures for sensor applications
Process design for plasma etching of polysilicon/silicon nitride/polysilicon sandwich structures for sensor applications
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Process design for plasma etching of polysilicon/silicon nitride/polysilicon sandwich structures for sensor applications

Li, Y.X. ; Laros, M. ; Sarro, P.M. ; French, P.J. ; Wolffenbuttel, R.F.

Microelectronic engineering, 1993-12, Vol.20 (4), p.321-328 [Periódico revisado por pares]

Amsterdam: Elsevier B.V

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9
Transfer of single-layer positive resist sub-micrometer and nanometer structures into silicon
Transfer of single-layer positive resist sub-micrometer and nanometer structures into silicon
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Transfer of single-layer positive resist sub-micrometer and nanometer structures into silicon

Rangelow, I.W. ; Borkowicz, Z. ; Hudek, P. ; Kostič, I.

Microelectronic engineering, 1994, Vol.25 (1), p.49-66 [Periódico revisado por pares]

Amsterdam: Elsevier B.V

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10
A novel technique for multiple-level dry etching (MULDE) featuring self-aligned etch masks
A novel technique for multiple-level dry etching (MULDE) featuring self-aligned etch masks
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A novel technique for multiple-level dry etching (MULDE) featuring self-aligned etch masks

Boche, B.

Microelectronic engineering, 1994-12, Vol.26 (1), p.63-69 [Periódico revisado por pares]

Amsterdam: Elsevier B.V

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