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Material Type: Artigo
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Pipelined Parallel FFT Architectures via Folding TransformationAyinala, M. ; Brown, M. ; Parhi, K. K.IEEE transactions on very large scale integration (VLSI) systems, 2012-06, Vol.20 (6), p.1068-1081 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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Material Type: Artigo
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GPU-Accelerated Parallel Sparse LU Factorization Method for Fast Circuit AnalysisKai He ; Tan, Sheldon X.-D ; Hai Wang ; Guoyong ShiIEEE transactions on very large scale integration (VLSI) systems, 2016-03, Vol.24 (3), p.1140-1150 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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Material Type: Artigo
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FCUDA-NoC: A Scalable and Efficient Network-on-Chip Implementation for the CUDA-to-FPGA FlowYao Chen ; Gurumani, Swathi T. ; Yun Liang ; Guofeng Li ; Donghui Guo ; Rupnow, Kyle ; Deming ChenIEEE transactions on very large scale integration (VLSI) systems, 2016-06, Vol.24 (6), p.2220-2233 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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Material Type: Artigo
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Area-Efficient Parallel FIR Digital Filter Structures for Symmetric Convolutions Based on Fast FIR AlgorithmTSAO, Yu-Chi ; CHOI, KenIEEE transactions on very large scale integration (VLSI) systems, 2012-02, Vol.20 (2), p.366-371 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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Material Type: Artigo
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A Flexible Parallel Hardware Architecture for AdaBoost-Based Real-Time Object DetectionKyrkou, C ; Theocharides, TIEEE transactions on very large scale integration (VLSI) systems, 2011-06, Vol.19 (6), p.1034-1047 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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Material Type: Artigo
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Efficient FPGA Implementations of Point Multiplication on Binary Edwards and Generalized Hessian Curves Using Gaussian Normal BasisAzarderakhsh, R. ; Reyhani-Masoleh, A.IEEE transactions on very large scale integration (VLSI) systems, 2012-08, Vol.20 (8), p.1453-1466 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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Material Type: Artigo
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A Generalized Conflict-Free Memory Addressing Scheme for Continuous-Flow Parallel-Processing FFT Processors With ReschedulingTSAI, Pei-Yun ; LIN, Chung-YiIEEE transactions on very large scale integration (VLSI) systems, 2011-12, Vol.19 (12), p.2290-2302 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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Material Type: Artigo
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SPREAD: A Streaming-Based Partially Reconfigurable Architecture and Programming ModelYing Wang ; Xuegong Zhou ; Lingli Wang ; Jian Yan ; Luk, Wayne ; Chenglian Peng ; Jiarong TongIEEE transactions on very large scale integration (VLSI) systems, 2013-12, Vol.21 (12), p.2179-2192 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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Material Type: Artigo
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Low-Complexity High-Speed Decoder Design for Quasi-Cyclic LDPC CodesWang, Zhongfeng ; Cui, ZhiqiangIEEE transactions on very large scale integration (VLSI) systems, 2007-01, Vol.15 (1), p.104-114 [Periódico revisado por pares]Piscataway, NJ: IEEETexto completo disponível |
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Material Type: Artigo
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Resource-Efficient FPGA Architecture and Implementation of Hough TransformZhong-Ho Chen ; Su, A. W. Y. ; Ming-Ting SunIEEE transactions on very large scale integration (VLSI) systems, 2012-08, Vol.20 (8), p.1419-1428 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |