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Neural Architecture Search Survey: A Hardware Perspective
Neural Architecture Search Survey: A Hardware Perspective
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Neural Architecture Search Survey: A Hardware Perspective

Chitty-Venkata, Krishna Teja ; Somani, Arun K.

ACM computing surveys, 2022-11, Vol.55 (4), p.1-36, Article 78 [Peer Reviewed Journal]

New York, NY: ACM

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2
SCANN: Synthesis of Compact and Accurate Neural Networks
SCANN: Synthesis of Compact and Accurate Neural Networks
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SCANN: Synthesis of Compact and Accurate Neural Networks

Hassantabar, Shayan ; Wang, Zeyu ; Jha, Niraj K.

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-09, Vol.41 (9), p.3012-3025 [Peer Reviewed Journal]

New York: IEEE

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3
A Tutorial on Ultrareliable and Low-Latency Communications in 6G: Integrating Domain Knowledge Into Deep Learning
A Tutorial on Ultrareliable and Low-Latency Communications in 6G: Integrating Domain Knowledge Into Deep Learning
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A Tutorial on Ultrareliable and Low-Latency Communications in 6G: Integrating Domain Knowledge Into Deep Learning

She, Changyang ; Sun, Chengjian ; Gu, Zhouyou ; Li, Yonghui ; Yang, Chenyang ; Poor, H. Vincent ; Vucetic, Branka

Proceedings of the IEEE, 2021-03, Vol.109 (3), p.204-246 [Peer Reviewed Journal]

New York: IEEE

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4
Efficient Processing of Deep Neural Networks: A Tutorial and Survey
Efficient Processing of Deep Neural Networks: A Tutorial and Survey
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Efficient Processing of Deep Neural Networks: A Tutorial and Survey

Sze, Vivienne ; Chen, Yu-Hsin ; Yang, Tien-Ju ; Emer, Joel S.

Proceedings of the IEEE, 2017-12, Vol.105 (12), p.2295-2329 [Peer Reviewed Journal]

New York: IEEE

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5
NeuroSim: A Circuit-Level Macro Model for Benchmarking Neuro-Inspired Architectures in Online Learning
NeuroSim: A Circuit-Level Macro Model for Benchmarking Neuro-Inspired Architectures in Online Learning
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NeuroSim: A Circuit-Level Macro Model for Benchmarking Neuro-Inspired Architectures in Online Learning

Chen, Pai-Yu ; Peng, Xiaochen ; Yu, Shimeng

IEEE transactions on computer-aided design of integrated circuits and systems, 2018-12, Vol.37 (12), p.3067-3080 [Peer Reviewed Journal]

New York: IEEE

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6
High-Performance CNN Accelerator on FPGA Using Unified Winograd-GEMM Architecture
High-Performance CNN Accelerator on FPGA Using Unified Winograd-GEMM Architecture
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High-Performance CNN Accelerator on FPGA Using Unified Winograd-GEMM Architecture

Kala, S. ; Jose, Babita R. ; Mathew, Jimson ; Nalesh, S.

IEEE transactions on very large scale integration (VLSI) systems, 2019-12, Vol.27 (12), p.2816-2828 [Peer Reviewed Journal]

New York: IEEE

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7
Evolving Unsupervised Deep Neural Networks for Learning Meaningful Representations
Evolving Unsupervised Deep Neural Networks for Learning Meaningful Representations
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Evolving Unsupervised Deep Neural Networks for Learning Meaningful Representations

Sun, Yanan ; Yen, Gary G. ; Yi, Zhang

IEEE transactions on evolutionary computation, 2019-02, Vol.23 (1), p.89-103 [Peer Reviewed Journal]

New York: IEEE

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8
DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-Chip Training
DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-Chip Training
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DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-Chip Training

Peng, Xiaochen ; Huang, Shanshi ; Jiang, Hongwu ; Lu, Anni ; Yu, Shimeng

IEEE transactions on computer-aided design of integrated circuits and systems, 2021-11, Vol.40 (11), p.2306-2319 [Peer Reviewed Journal]

New York: IEEE

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9
A review of convolutional neural network architectures and their optimizations
A review of convolutional neural network architectures and their optimizations
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A review of convolutional neural network architectures and their optimizations

Cong, Shuang ; Zhou, Yang

The Artificial intelligence review, 2023-03, Vol.56 (3), p.1905-1969 [Peer Reviewed Journal]

Dordrecht: Springer Netherlands

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10
Review of Deep Learning Algorithms and Architectures
Review of Deep Learning Algorithms and Architectures
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Review of Deep Learning Algorithms and Architectures

Shrestha, Ajay ; Mahmood, Ausif

IEEE access, 2019, Vol.7, p.53040-53065 [Peer Reviewed Journal]

Piscataway: IEEE

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