Result Number | Material Type | Add to My Shelf Action | Record Details and Options |
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1 |
Material Type: Artigo
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PBS: proven Boolean simplificationAagaard, M. ; Leeser, M.IEEE transactions on computer-aided design of integrated circuits and systems, 1994-04, Vol.13 (4), p.459-470 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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2 |
Material Type: Artigo
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Hybrid Architectures for Efficient and Secure Face Authentication in Embedded SystemsAaraj, N. ; Ravi, S. ; Raghunathan, A. ; Jha, N.K.IEEE transactions on very large scale integration (VLSI) systems, 2007-03, Vol.15 (3), p.296-308 [Periódico revisado por pares]Piscataway, NJ: IEEETexto completo disponível |
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3 |
Material Type: Artigo
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Built-in time measurement circuits - : a comparative design studyABAS, M. A ; RUSSELL, G ; KINNIMENT, D. JIET computers & digital techniques, 2007-03, Vol.1 (2), p.87-97 [Periódico revisado por pares]Stevenage: Institution of Engineering and TechnologyTexto completo disponível |
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4 |
Material Type: Artigo
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Adaptive hierarchical scheduling policy for enterprise grid computing systemsAbawajy, J.H.Journal of network and computer applications, 2009-05, Vol.32 (3), p.770-779 [Periódico revisado por pares]Kidlington: Elsevier LtdTexto completo disponível |
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5 |
Material Type: Artigo
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AMBA bus hardware accelerator IP for Viola–Jones face detectionAcasandrei, Laurentiu ; Barriga, AngelIET computers & digital techniques, 2013-09, Vol.7 (5), p.200-209 [Periódico revisado por pares]Stevenage: The Institution of Engineering and TechnologyTexto completo disponível |
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6 |
Material Type: Artigo
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SODS: a new CMOS differential-type structureAcosta, A.J. ; Valencia, M. ; Barriga, A. ; Bellido, M.J. ; Huertas, J.L.IEEE journal of solid-state circuits, 1995-07, Vol.30 (7), p.835-838, Article 835 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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7 |
Material Type: Ata de Congresso
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Fast and accurate parasitic capacitance models for layout-aware synthesis of analog circuitsAGARWAL, Anuradha ; SAMPATH, Hemanth ; YELAMANCHILI, Veena ; VEMURI, RangaPiscataway NJ: Association for Computing Machinery 2004Texto completo disponível |
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8 |
Material Type: Artigo
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Ternary CAM Power and Delay Model: Extensions and UsesAgrawal, B. ; Sherwood, T.IEEE transactions on very large scale integration (VLSI) systems, 2008-05, Vol.16 (5), p.554-564 [Periódico revisado por pares]Piscataway, NJ: IEEETexto completo disponível |
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9 |
Material Type: Artigo
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A hardware logic simulation systemAgrawal, P. ; Dally, W.J.IEEE transactions on computer-aided design of integrated circuits and systems, 1990-01, Vol.9 (1), p.19-29 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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10 |
Material Type: Artigo
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Low-power compact composite field AES S-Box/Inv S-Box design in 65 nm CMOS using Novel XOR GateAHMAD, Nabihah ; REZAUL HASAN, S. MIntegration (Amsterdam), 2013-09, Vol.46 (4), p.333-344 [Periódico revisado por pares]Amsterdam: ElsevierTexto completo disponível |