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1
Hardware Support for Prescient Instruction Prefetch
Hardware Support for Prescient Instruction Prefetch
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Hardware Support for Prescient Instruction Prefetch

Aamodt, T.M. ; Chow, P. ; Hammarlund, P. ; Wang, Hong ; Shen, J.P.

10th International Symposium on High Performance Computer Architecture (HPCA'04), 2004, p.84-84

Los Alamitos CA: IEEE

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2
Iterative-based minimization of unary 4-valued functions for current-mode CMOS realization
Iterative-based minimization of unary 4-valued functions for current-mode CMOS realization
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Iterative-based minimization of unary 4-valued functions for current-mode CMOS realization

Abd-El-Barr, M. ; Al-Awami, L.

Proceedings. 34th International Symposium on Multiple-Valued Logic, 2004, p.315-320

Los Alamitos CA: IEEE

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3
Low-complexity distributed issue queue
Low-complexity distributed issue queue
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Low-complexity distributed issue queue

Abella, J. ; Gonzalez, A.

10th International Symposium on High Performance Computer Architecture (HPCA'04), 2004, p.73-82

Los Alamitos CA: IEEE

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4
On the optimisation of Reed-Muller expressions
On the optimisation of Reed-Muller expressions
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On the optimisation of Reed-Muller expressions

Adams, K.J. ; McGregor, J.

Proceedings. 34th International Symposium on Multiple-Valued Logic, 2004, p.168-176

Los Alamitos CA: IEEE

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5
Speculative trace scheduling in VLIW processors
Speculative trace scheduling in VLIW processors
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Speculative trace scheduling in VLIW processors

Agarwal, M. ; Nandy, S.K.

Proceedings, IEEE International Conference on Computer Design, 2002, p.408-413

Piscataway NJ: IEEE

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6
Defining wakeup width for efficient dynamic scheduling
Defining wakeup width for efficient dynamic scheduling
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Defining wakeup width for efficient dynamic scheduling

Aggarwal, A. ; Franklin, M. ; Ergin, O.

IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings, 2004, p.36-41

Los Alamitos CA: IEEE

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7
Uniform description of calculi for all t-norm logics
Uniform description of calculi for all t-norm logics
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Uniform description of calculi for all t-norm logics

Aguzzoli, S.

Proceedings. 34th International Symposium on Multiple-Valued Logic, 2004, p.38-43

Los Alamitos CA: IEEE

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8
Evaluating the Imagine Stream Architecture
Evaluating the Imagine Stream Architecture
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Evaluating the Imagine Stream Architecture

Ahn, Jung Ho ; Dally, William J. ; Khailany, Brucek ; Kapasi, Ujval J. ; Das, Abhishek

International Symposium on Computer Architecture: Proceedings of the 31st annual international symposium on Computer architecture : Munchen, Germany; 19-23 June 2004, 2004, p.14-14

Washington, DC, USA: IEEE Computer Society

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9
Feature extraction based built-in alternate test of RF components using a noise reference
Feature extraction based built-in alternate test of RF components using a noise reference
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Feature extraction based built-in alternate test of RF components using a noise reference

Akbay, S.S. ; Chatterjee, A.

22nd IEEE VLSI Test Symposium, 2004. Proceedings, 2004, p.273-278

Piscataway NJ: IEEE

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10
Perceptron-Based Branch Confidence Estimation
Perceptron-Based Branch Confidence Estimation
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Perceptron-Based Branch Confidence Estimation

Akkary, H. ; Srinivasan, S.T. ; Koltur, R. ; Patil, Y. ; Refaai, W.

10th International Symposium on High Performance Computer Architecture (HPCA'04), 2004, p.265-265

Los Alamitos CA: IEEE

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