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Refinado por: Nome da Publicação: Electronics Letters remover
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1
Charge-dumping switching scheme for successive-approximation-register analogue-to-digital converters
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Artigo
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Charge-dumping switching scheme for successive-approximation-register analogue-to-digital converters

Chiang, Shiuh-hua Wood

Electronics letters, 2016-03, Vol.52 (5), p.348-350 [Periódico revisado por pares]

The Institution of Engineering and Technology

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2
Energy-efficient switching scheme in SAR ADC for biomedical electronics
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Energy-efficient switching scheme in SAR ADC for biomedical electronics

Tong, Xingyuan ; Ghovanloo, Maysam

Electronics letters, 2015-04, Vol.51 (9), p.676-678 [Periódico revisado por pares]

The Institution of Engineering and Technology

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3
Mixed capacitor switching scheme for SAR ADC with highest switching energy efficiency
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Mixed capacitor switching scheme for SAR ADC with highest switching energy efficiency

Ni, Yabo ; Liu, Lu ; Xu, Shiliu

Electronics letters, 2015-03, Vol.51 (6), p.466-467 [Periódico revisado por pares]

The Institution of Engineering and Technology

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4
High-speed two-step single-slope ADC using multi-sampling with partial conversion
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High-speed two-step single-slope ADC using multi-sampling with partial conversion

Kim, Jong-Boo ; Hong, Seong-Kwan ; Kwon, Oh-Kyong

Electronics letters, 2015-02, Vol.51 (4), p.325-327 [Periódico revisado por pares]

The Institution of Engineering and Technology

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5
Adaptive and joint blind calibration of gain, time-skew and bandwidth mismatch errors in time-interleaved ADCs
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Adaptive and joint blind calibration of gain, time-skew and bandwidth mismatch errors in time-interleaved ADCs

De Teyou, G.K ; Petit, H ; Loumeau, P

Electronics letters, 2015-10, Vol.51 (22), p.1752-1754 [Periódico revisado por pares]

The Institution of Engineering and Technology

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6
Energy-efficient charge-recovery switching scheme for dual-capacitive arrays SAR ADC
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Energy-efficient charge-recovery switching scheme for dual-capacitive arrays SAR ADC

Li, Y ; Zhang, Z ; Lian, Y

Electronics letters, 2013-02, Vol.49 (5), p.1-1 [Periódico revisado por pares]

Stevenage: John Wiley & Sons, Inc

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7
ADC sampling reduction by an efficient implementation of queue application to X-ray spectrometry imagers
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ADC sampling reduction by an efficient implementation of queue application to X-ray spectrometry imagers

Rostaing, J.-P ; Sicard, G ; Dupret, A ; Peizerat, A ; Villard, P

Electronics letters, 2016-03, Vol.52 (6), p.428-430 [Periódico revisado por pares]

The Institution of Engineering and Technology

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8
Multi-step extended-counting analogue-to-digital converters
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Multi-step extended-counting analogue-to-digital converters

Chen, C-H ; Jung, Y ; Ceballos, J L ; Temes, G C

Electronics letters, 2013-01, Vol.49 (1), p.1-1 [Periódico revisado por pares]

Stevenage: John Wiley & Sons, Inc

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9
Two-step incremental analogue-to-digital converter
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Two-step incremental analogue-to-digital converter

Chen, C-H ; Zhang, Y ; Jung, Y ; He, T ; Ceballos, J L ; Temes, G C

Electronics letters, 2013-02, Vol.49 (4), p.1-1 [Periódico revisado por pares]

Stevenage: John Wiley & Sons, Inc

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10
Efficient technique for excess loop delay compensation in continuous-time ΔΣ modulators
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Efficient technique for excess loop delay compensation in continuous-time ΔΣ modulators

Zhang, Y ; Chen, C.H ; Temes, G.C

Electronics letters, 2013-11, Vol.49 (24), p.1522-1523 [Periódico revisado por pares]

Stevenage: The Institution of Engineering and Technology

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